Title: Optimization-based Framework for Simultaneous Circuit-and-System Design-space Exploration of Analog/Mixed-Signal Front-ends: A High-speed Link Example
Dr. Vladimir Stojanovic
From the Dept. of EECS, Massachusetts Institute of Technology (MIT), USA.
Ranko Sredojevic, Vladimir Stojanovic, MIT, Cambridge, MA, USA
Connecting system-level performance models with circuit information has been a long-standing problem in analog/mixed-signal front-ends, like radios and high-speed links. This connection is particularly valuable to provide a well-balanced system in today's performance, power and area constrained front-ends. While equation-based optimization techniques have proven useful in this type of design-space exploration at the circuit level, managing the model complexity across the levels of design hierarchy has proven to be a difficult problem.
High-speed links are particularly hard to analyze because of the complex interplay of device/circuit parasitics and channel filtering operation. In this paper we introduce optimization-based framework for link design-space exploration, connecting the link transmission quality and top-level filter settings with circuit power, sizing and biasing. We derive a special analytical discrete time representation that avoids the size explosion of the symbolic problem description improving the parsing and solver time by orders of magnitude and making this joint optimization possible in real-time. This robust and accurate problem formulation is derived in signomial form and is compatible with existing optimization approaches to circuit sizing. We demonstrate this optimization framework on a link design-space exploration example, investigating trade-offs between the transmit preemphasis and linear receiver equalizer and their impact on overall link power vs. data rate.
Vladimir Stojanovic is an assistant professor in the Department of Electrical Engineering and Computer Science, MIT. He received his Ph.D. in Electrical Engineering from Stanford University in 2005. He received his M.S. degree in Electrical Engineering from Stanford University in 2000 and the Dipl. Ing. degree from the University of Belgrade, Serbia in 1998. He was also with Rambus, Inc., Los Altos, CA, from 2001 through 2004. He was a visiting scholar with the Advanced Computer Systems Engineering Laboratory, Department of Electrical and Computer Engineering, University of California, Davis, during 1997-1998.
His current research interests include design, modeling and optimization of integrated systems, from standard VLSI blocks to CMOS-based electrical and optical interfaces. He is also interested in design and implementation of digital communication techniques in high-speed interfaces and high-speed mixed signal IC design.