IEEE Fellow

As it stands today, the IEEE Grade of Fellow is conferred by the Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. The total number selected in any one year does not exceed one-tenth of one percent of the total voting Institute membership. Each new Fellow receives a beautifully matted and framed certificate with the name of the Fellow and a brief citation describing the accomplishment, a congratulatory letter from the incoming IEEE president and a gold sterling silver Fellow lapel pin with an antique finish. 

Please note: The list below includes "IEEE Fellows" elevated by the Council on Electronic Design Automation. The Council acknowledges that there are additional members of our community that have been elevated by other organizational units of the IEEE.

Nomination Details:

The nomination cycle for the next years' class of Fellows opens 1 September two years prior. For example, the class of 2020 nomination cycle opened 1 September 2018.

Information on the IEEE Fellows Program to help nominators prepare their submissions.

Recipients

Sung Kyu Lim

for contributions to electronic design automation and the tradeoff for 3-dimensional integrated circuits


Sherief Reda

for contributions to energy-efficient and approximate computing


Fung Yu Young

for contributions to electronic design automation in VLSI physical design


Zhiru Zhang

for contributions to field-programmable gate array high-level synthesis and accelerator design


Norman Chang

for leadership in the physical-level sign-off of Electronic Design Automation for SoC/ 3DIC


Ryan Kastner

for contributions to the design and security of reconfigurable systems

Samarjit Chakraborty

for contributions to system-level timing analysis of cyber-physical systems


R. Iris Bahar

for contributions to modeling and design of power-aware and noise-tolerant nanoscale computing systems


Yu Wang

for contributions to domain specific accelerator design


Mahesh Iyer

for leadership in ASIC and FPGA Electronic Design Automation