IEEE Fellow

As it stands today, the IEEE Grade of Fellow is conferred by the Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. The total number selected in any one year does not exceed one-tenth of one percent of the total voting Institute membership. Each new Fellow receives a beautifully matted and framed certificate with the name of the Fellow and a brief citation describing the accomplishment, a congratulatory letter from the incoming IEEE president and a gold sterling silver Fellow lapel pin with an antique finish.

Please note: The list below includes "IEEE Fellows" elevated by the Council on Electronic Design Automation. The Council acknowledges that there are additional members of our community that have been elevated by other organizational units of the IEEE.

Nomination Details:

The nomination cycle for the next years' class of Fellows opens 1 September two years prior. For example, the class of 2020 nomination cycle opened 1 September 2018.

View the 2020 Fellows Committee

Information on the IEEE Fellows Program to help nominators prepare their submissions.

Recipients

2020

Maciej Ciesielski

For contributions to logic synthesis and formal verification of arithmetic circuits

Partha Pratim Pande

For contributions to network-on-chip architectures for manycore computing

2019

Hai (Helen) Li

for contributions to neuromorphic computing systems

Farinaz Koushanfar

for contributions to hardware and embedded systems security and to privacy-preserving computing

Antun Domic

for technical leadership in the integrated circuits design
automation

Deming Chen

Biography

Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He joined the ECE department of University of Illinois at Urbana-Champaign in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department. His current research interests include system-level and high-level synthesis, machine learning algorithms and acceleration, GPU and reconfigurable computing, computational genomics, and hardware security. He has given more than 110 invited talks sharing these research results worldwide.

Dr. Chen is a technical committee member for a series of top conferences and symposia on EDA, FPGA, low-power design, and VLSI systems design. He has also served as General or TPC Chair, Track Chair, Session Chair, Panelist, Panel Organizer, or Moderator for these conferences. He is or has been an associated editor for IEEE TCAD, ACM TODAES, IEEE TVLSI, ACM TRETS, IEEE TCAS-I and TCAS-II, IET Cyber-Physical Systems, JCSC, and JOLPE. He obtained the Achievement Award for Excellent Teamwork from Aplus Design Technologies in 2001, the Arnold O. Beckman Research Award from UIUC in 2007, the NSF CAREER Award in 2008, and nine Best Paper Awards. He is included in the List of Teachers Ranked as Excellent in 2008 and 2017. He received the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014 and 2015. In 2017 and 2019 respectively, he led a team to win the first place of DAC International System Design Contest. He has given a series of Keynote or Plenary speeches at various conferences. He is the Donald Biggar Willett Faculty Scholar and Abel Bliss Professor of College of Engineering, an IEEE Fellow, an ACM Distinguished Speaker, and the Editor-in-Chief of ACM Transactions on Reconfigurable Technology and Systems (TRETS).

Dr. Chen was involved in several startup companies. He implemented his published algorithm on CPLD technology mapping when he was a software engineer in Aplus Design Technologies, Inc. in 2001, and the software was exclusively licensed by Altera and distributed to many customers of Altera worldwide. He is one of the inventors of the xPilot High Level Synthesis package developed at UCLA, which was licensed to AutoESL Design Technologies, Inc. Aplus was acquired by Magma in 2003, and AutoESL was acquired by Xilinx in 2011. He has also served as a consultant for several leading semiconductor companies.

In 2016, he co-founded a startup, Inspirit IoT, Inc., for design, acceleration and deployment of machine learning solutions targeting the IoT industry. He is currently the Chairman of the Board and the Interim CTO of the company. Inspirit IoT recently received an NSF SBIR (Small Business Innovation Research) Award from the US government.

Affiliation

University of Illinois at Urbana-Champaign

United States

for contributions to FPGA high-level synthesis

Hiroto Yasuura

for contributions to energy-efficiency and dependability of Very
Large Scale Integration designs

2018

Hidetoshi Onodera

For contributions to variation-aware design and analysis of
integrated circuits

Tajana Rosing

for contributions to power and reliability management of Systems-on-Chip

Mark M. Tehranipoor

for contributions to integrated circuits security and trust

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