Donald O. Pederson Best Paper Award Committee

Pederson Award Chair

Rajesh K. Gupta

University of California, San Diego

United States

6 (Western U.S.)

Rajesh K. Gupta

6 (Western U.S.)

Biography

Rajesh K. Gupta (F’91) received the B.Tech. degree in electrical engineering from Indian Institute of Technology Kanpur, Kanpur, India, in 1984, the M.S. degree in EECS from University of California, Berkeley, Berkeley, CA, USA, in 1986, and the Ph.D. degree in electrical engineering from Stanford University, Stanford, CA, USA, in 1994.

He is a Qualcomm Endowed Chair Professor with the Department of Computer Science and Engineering, University of California, San Diego, San Diego, CA, USA. He was a Circuit Designer with Intel Corporation, Santa Clara, CA, USA, as a member of three successful processor design teams and on the Computer Science Faculty, University of Illinois, Urbana-Champaign, Champaign, IL, USA and the University of California, Irvine, Irvine, CA, USA. Regardless of the title, the focus of the research has been on methods and tools to make things better, such as, more energy-efficient and reliable, or enable others (mostly, designers and architects) to do things better. To the extent a problem area requires it, there is a focus on creating usable artifacts or at least find the limits on what is achievable in practice. His past contributions include SystemC modeling and SPARK parallelizing high-level synthesis, both of which have been incorporated into industrial practice. His publications and patents cover various aspects of embedded systems design, design automation, clock design, data-path synthesis, system-on-chip modeling, and dynamic power management. He was a Lead or a Co-Lead of DARPA-sponsored efforts under the data-intensive systems and power-aware computing and communications programs on the role of adaptation in energy-efficient system architectures. His ongoing projects are focused on efficient compositional synthesis of system-chips, microelectronic variability, accurate timing, and synchronization for the integrated systems. His current research interests include embedded,cyber-physical systems, and Internet-of-Things.

Dr. Gupta was a recipient of the Best Demonstration Paper Award at ACM BuildSys’16, the Best Paper Award at IEEE/ACM DCOSS’08, and the Best Demonstration Award at IEEE/ACM IPSN/SPOTS’05 with and his students. He is a fellow of the ACM.

Affiliation(s)

University of California, San Diego

United States

Pederson Award Member

Alberto Sangiovanni-Vincentelli

University of California, Berkeley

United States

6 (Western U.S.)

Alberto Sangiovanni-Vincentelli

6 (Western U.S.)

Biography

Alberto Sangiovanni Vincentelli is the Edgar L. and Harold H. Buttner Chair of Electrical Engineering and Computer Sciences at the University of California at Berkeley. In 1980-1981, he was a Visiting Scientist at the Mathematical Sciences Department of the IBM T.J. Watson Research Center. In 1987, he was Visiting Professor at MIT. He is an author of over 800 papers, 17 books and 2 patents in the area of design tools and methodologies, large scale systems, embedded systems, hybrid systems and innovation. He was a co-founder of Cadence and Synopsys, the two leading companies in the area of Electronic Design Automation and the founder and Scientific Director of the PARADES Research Center in Rome.

Board Participation: • Public Companies: He has been a member of the Board of Directors of Cadence and of KPIT-Cummins. • Privately Held Companies: He is a member of the Board of Directors of Sonics, and of Expert Systems. • Advisory Boards: He had been a member of the ST microelectronics Advisory Board for 10 years. He was a member of the HP Strategic Technology Advisory Board (2005-2007), a member of the Science and Technology Advisory Board of General Motors (2003-2013), and is a member of the Technology Advisory Council of United Technologies Corporation (2005-present). He is a member of the Advisory Board of Innogest, Xseed and a member of the Investment Committee of Atlante Ventures and Fondo Next. Since January 2013, he is the President of the Strategic Committee of the Italian Strategic Fund. He is member of the Scientific Council of the Italian National Science Foundation (CNR). Since February 2010, he has been a member of the Executive Committee of the Italian Institute of Technology. Since July 2012, he has been named Chairperson of the Comitato Nazionale Garanti per la Ricerca.

Affiliation(s)

University of California, Berkeley

United States

Sharad Malik

Princeton University

United States

1 (Northeastern U.S.)

Sharad Malik

1 (Northeastern U.S.)

Biography

Sharad Malik (F’02) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology Delhi, New Delhi, India, in 1985, and the M.S. and Ph.D. degrees in computer science from the University of California at Berkeley, Berkeley, CA, USA, in 1987 and 1990, respectively.

He served as the Director of the Keller Center for Innovation in Engineering Education, Princeton University, Princeton, NJ, USA, from 2006 to 2011. He is the George Van Ness Lothrop Professor of Engineering with Princeton University and the Chair of the Department of Electrical Engineering. He has served as the Director of the multi-university MARCO Gigascale Systems Research Center, Berkeley, CA, USA, from 2009 to 2012, and as the Associate Director of the Center for Future Architectures Research, Ann Arbor, MI, USA, from 2013 to 2016. His research in functional timing analysis and propositional satisfiability has been widely used in industrial electronic design automation tools. His current research interest includes design methodology and design automation for computing systems.

Dr. Malik has received the IEEE/ACM Design Automation Conference Award for the most cited paper in the 50-year history of the conference in 2013, the Computer-Aided Verification Award for fundamental contributions to the development of high-performance Boolean satisfiability solvers in 2009, the IEEE/ACM International Conference on Computer-Aided Design Ten Year Retrospective Most Influential Paper Award in 2011, the IEEE CEDA A. Richard Newton Technical Impact Award in Electronic Design Automation in 2017, the Princeton University Presidents Award for Distinguished Teaching in 2009, the IIT Delhi Distinguished Alumni Award in 2009, as well as several other research and teaching awards. He is a fellow of the ACM.

Affiliation(s)

Princeton University

United States

Rob A. Rutenbar

University of Pittsburgh

United States

2 (Eastern U.S.)

Rob A. Rutenbar

2 (Eastern U.S.)

Biography

Rob A. Rutenbar is the Senior Vice Chancellor for Research, and provides strategic vision, leadership, and partnership expertise that helps University of Pittsburgh researchers and scholars advance their world-class research, scholarship, and innovation. He is responsible for advancing Pitt’s mission to expand the frontiers of knowledge and positively impact the world through collaborative and multidisciplinary approaches to research.

He leads five offices focused on the full breadth of the research enterprise -- from pursuing and securing sponsorships and funding, through ensuring adherence to the highest standards to research conduct, and providing cutting-edge resources to researchers, to creative collaborations that lead to successful commercialization.

Dr. Rutenbar possesses nearly 40 years of experience in innovation and technology. His research focuses on three broad categories: tools for a wide variety of integrated circuit design issues, methods for managing the statistics of nanoscale chip design, and custom computer architectures for perceptual and data analytics problems.

Prior to coming to the University of Pittsburgh, he served as the Abel Bliss Professor of Engineering and head of the Department of Computer Science at the University of Illinois at Urbana-Champaign, where he oversaw a department composed of 70 faculty members and nearly 2,500 students consistently ranked as the No. 5 Computer Science program in the nation by U.S. News and World Report. Prior to assuming that position in 2010, Dr. Rutenbar held the Stephen J. Jatras Chair in Electrical and Computer Engineering at Carnegie Mellon University, where he served on the engineering faculty for 25 years.

As an entrepreneur, Dr. Rutenbar founded the tech firms Neolinear Inc. and Voci Technologies, Inc. in 1998 and 2006, respectively. He was the founding director for the Center for Circuit and System Solutions, a multi-university consortium that focused on next-generation chip design challenges. The recipient of 14 U.S. patent grants, his endeavors have been funded by such notable entities as AT&T, Google, DARPA, IBM, the National Science Foundation and the Pennsylvania Infrastructure Technology Alliance. Dr. Rutenbar is the author of eight books and 175 published research articles.

In recognition of his career accomplishments, Dr. Rutenbar was elected a fellow of both the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE). He is a winner of the Semiconductor Research Corporation’s Aristotle Award, given in recognition of the impact of his students on the U.S. semiconductor industry, and the IEEE CEDA/ESDA Phil Kaufman Award, for his lifetime contributions to tools for chip design. He was also recognized with distinguished alumnus awards from both the University of Michigan and Wayne State University. Dr. Rutenbar is also among the top scientists to be elected both as an American Association for the Advancement of Science Fellow and as a National Academy of Inventors (NAI) Fellow. Election to NAI Fellow is the highest professional distinction for academic inventors.

In addition to his research career, Dr. Rutenbar is also a committed educator. He led efforts at Illinois to explore massive, open online courses (MOOCs) and launched the first MOOC on chip design tools. His course is currently the largest such educational offering available globally and has had over 60,000 registered learners since its 2013 debut.

Dr. Rutenbar earned his bachelor’s degree in electrical engineering at Wayne State University in 1978. He earned master’s and doctorate degrees in computer information and control engineering at the University of Michigan in 1979 and 1984, respectively.

Affiliation(s)

University of Pittsburgh

United States

Yervant Zorian

Synopsys, Inc.

United States

10 (Asia and Pacific)

Yervant Zorian

10 (Asia and Pacific)

Biography

Dr. Yervant Zorian is a Chief Architect and Fellow at Synopsys, as well as President of Synopsys Armenia. Formerly, he was Vice President and Chief Scientist of Virage Logic, Chief Technologist at LogicVision, and a Distinguished Member of Technical Staff AT&T Bell Laboratories. He is currently the President of IEEE Test Technology Technical Council (TTTC), the founder and chair of the IEEE 1500 Standardization Working Group, the Editor-in-Chief Emeritus of the IEEE Design and Test of Computers and an Adjunct Professor at University of British Columbia. He served on the Board of Governors of Computer Society and CEDA, was the Vice President of IEEE Computer Society, and the General Chair of the 50th Design Automation Conference (DAC) and several other symposia and workshops.

Dr. Zorian holds 35 US patents, has authored four books, published over 350 refereed papers and received numerous best paper awards. A Fellow of the IEEE since 1999, Dr. Zorian was the 2005 recipient of the prestigious Industrial Pioneer Award for his contribution to BIST, and the 2006 recipient of the IEEE Hans Karlsson Award for diplomacy. He received the IEEE Distinguished Services Award for leading the TTTC, the IEEE Meritorious Award for outstanding contributions to EDA, and in 2014, the Republic of Armenia's National Medal of Science.

He received an MS degree in Computer Engineering from University of Southern California, a PhD in Electrical Engineering from McGill University, and an MBA from Wharton School of Business, University of Pennsylvania.

Affiliation(s)

Synopsys, Inc.

United States

Sachin Sapatnekar

University of Minnesota

United States

4 (Central U.S.)

Website

Sachin Sapatnekar

4 (Central U.S.)

Website

Biography

Sachin Sapatnekar received the B. Tech. degree from the Indian Institute of Technology, Bombay in 1987, the M. S. degree from Syracuse University in 1989, and the Ph. D. degree from the University of Illinois at Urbana-Champaign in 1992. He worked at Texas Instruments during the summer of 1990, and at Intel Corporation during the summer of 1997. His other major educational qualifications include self-taught basic juggling under the long-distance tutelage of the world-renowned Klutz School in 1991, and the PADI Open Water Diver Certification from Deep Sea Divers Den in 2001. With his once-a-decade average of trying something new, he is sure to remain his same old boring self until 2011. So boring that it's well past 2011, and this hasn't been updated.

He was an Assistant Professor in the Department of Electrical and Computer Engineering at Iowa State University from 1992 to 1997. He is currently a Professor in the Department of Electrical and Computer Engineering at the University of Minnesota, where he holds the Robert and Marjorie Henle chair and the Distinguished McKnight University Professorship. His current research interests lie in developing efficient techniques for computer-aided design of integrated circuits and are primarily centered around physical design, timing and simulation issues, and optimization algorithms. He has served on the editorial boards of several IEEE journals, including as Editor-in-Chief of the IEEE Transactions on CAD. He was a Technical Program Co-chair in 2006 and 2007 for the Design Automation Conference (DAC), and the General Chair in 2010. He has also been the Technical Program Chair and General Chair for the International Symposium on Physical Design (ISPD) and the Tau workshop, and Program Chair for the International Conference on VLSI Design in India. He is a recipient of the NSF Career Award, the SRC Technical Excellence Award, the SIA University Researcher Award, Best Paper Awards at the DAC'97, ICCD'98, DAC'01 DAC'03, ISPD'09, ISQED'10, and ASYNC'16 conferences, a Best Poster Award at IRPS'12, and the ICCAD Ten-Year Retrospective Most Influential Paper Award in 2013 and 2016. He has been a Fulbright Senior Researcher at Universitat Politècnica de Catalunya in Barcelona in 2013, and a DJ Gandhi Visiting Professor at the Indian Institute of Technology, Bombay in 2014. He is a Fellow of the IEEE (2003) and the ACM (2016).

Affiliation(s)

University of Minnesota

United States

Pederson Award Chair

Rajesh K. Gupta

Pederson Award Member

Alberto Sangiovanni-Vincentelli

Sharad Malik

Rob A. Rutenbar

Yervant Zorian

Sachin Sapatnekar

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