IEEE Embedded Systems Letters Editorial Board | IEEE Council on Electronic Design Automation

ESL Editor-in-Chief

Preeti Ranjan Panda

Indian Institute of Technology, Delhi

India

10 (Asia and Pacific)

Preeti Ranjan Panda

10 (Asia and Pacific)

Biography

Preeti Ranjan Panda received his B. Tech. degree in Computer Science and Engineering from the Indian Institute of Technology Madras and his M. S. and Ph.D. degrees in Information and Computer Science from the University of California at Irvine. He is currently a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Delhi. He has previously worked at Texas Instruments, Bangalore, and the Advanced Technology Group at Synopsys Inc., Mountain View, and has been a visiting scholar at Stanford University.

His research interests are Embedded Systems Design, CAD/VLSI, Post-silicon Debug/Validation, System Specification and Synthesis, Memory Architectures and Optimisations, Hardware/Software Codesign, and Low Power Design. He is the author of two books: Memory issues in Embedded Systems-on-chip: Optimizations and Exploration (Kluwer Academic Publishers) and Power-efficient System Design (Springer). He is a recipient of an IBM Faculty Award , the IESA Techno Mentor Award, and a Department of Science and Technology Young Scientist Award. Research works authored by Prof. Panda and his students have received several honours, including Best Paper nominations at CODES+ISSS, DATE, ASPDAC, and VLSI Design Conference, and Most downloaded paper of ACM TODAES journal.

Prof. Panda currently serves as the Editor-in-Chief of IEEE Embedded Systems Letters (ESL). He has served on the editorial boards of IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD) , ACM Transactions on Design Automation of Electronic Systems (TODAES) , IEEE Embedded Systems Letters (ESL), IEEE Transactions on Multi-Scale Computing Systems (TMSCS) and International Journal of Parallel Programming (IJPP), General co-Chair of VLSI Design, and as Technical Program co-Chair of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) and International Conference on VLSI Design and Embedded Systems (VLSI Design). He has also served on the technical program committees and chaired sessions at several conferences in the areas of Embedded Systems and Design Automation, including DAC, ICCAD, DATE, CODES+ISSS, IPDPS, ASPDAC, and EMSOFT.

Affiliation(s)

Indian Institute of Technology, Delhi

India

ESL Deputy Editor-in-Chief

Aviral Shrivastava

Arizona State University

United States

6 (Western U.S.)

Aviral Shrivastava

6 (Western U.S.)

Biography

Aviral Shrivastava is a full Professor in the School of Computing and Augmented Intelligence (SCAI) at the Arizona State University, where he established and heads the Make Programming Simple Lab (https://labs.engineering.asu.edu/mps-lab/). He completed his Ph.D. in Information and Computer Science and from the University of California, Irvine, and bachelorÕs in Computer Science and Engineering from IIT Delhi.

Research: Prof. ShrivastavaÕs main theme of research in on making programming simple for embedded and cyber-physical systems. Prof. Shrivastava and his students have proposed novel computer architectures and compiler transformations for hardware error-tolerant computing, multicore computing, accelerated computing. They have also proposed languages, code generation and runtime for expressing and efficiently executing time-sensitive distributed intelligent applications.

Prof. Shrivastava has co-authored 1 book, and has contributed chapters in 4 books. He has more than 120 articles and conference papers in top embedded system journals and conferences, like DAC, ESWEEK, ACM TECS, and ACM TCPS. His papers have received several awards, including nomination for best paper at DAC 2017, best student paper award at VLSI 2016, second highest ranked paper at LCTES 2010, and best paper candidate ASPDAC 2008. He published at least one paper every year at DAC (the top conference in the field) in the last decade (2011 to 2019). Overall, his works have received more than 3000 citations, growing at the rate of over 200 citations every year. His i50-index is 14, i10-index is 84, and h-index is 31 (reference Google Scholar). His inventions have been granted 5 patents, and 5 more applications are pending. Prof. Shrivastava is the recipient of the prestigious 2010 NSF CAREER award. His studentÕs theses were awarded CIDSE outstanding Ph.D. thesis award in 2021 and 2017 and outstanding MasterÕs thesis awards in 2011 and 2014. Prof. ShrivastavaÕs research efforts have been supported by federal agencies (NSF, DOE, NIST), state funding agencies (SFAZ), as well as industry. His research portfolio is about $4M to date.

Prof. Shrivastava has mentored 2 postdocs, 9 Ph.D. students, and over 20 Masters students. His students are very well placed, including a full Professor at UNIST, South Korea, Assistant Professor at SJSU, ARM research lab, Google, Synopsys, Apple (x2), Qualcomm, Cadence etc.) Prof. Shrivastava is currently supervising 3 Ph.D., and 5 Masters students. Prof. Shrivastava teaches undergraduate and graduate level courses on computer organization, computer architecture, and embedded systems, and has student evaluations averaging over 4/5. He revamped the computer organization and computer Architecture courses at ASU to shift the focus towards processor design instead of assembly language programming and included modules about modern multicore architectures. He has redesigned the embedded systems course around projects in which students build an autonomously driving car, culminating in an autonomous car race! (https://www.youtube.com/channel/UCDfyzk7HFqeXCb5BK02SemQ)

Prof. Shrivastava was the General Chair of 2022 Embedded Systems Week (ESWEEK), which is the top event in the field of Embedded Systems, comprising of several conferences, symposia and workshops. He also serves in the Steering committee of the Languages Compilers, Theory and tools for Embedded Systems (LCTES). Currently, he is the deputy Editor-in-Chief of IEEE Embedded Systems Letters (IEEE ESL), and associate editor for ACM Transactions of Cyber-Physical Systems (ACM TCPS), ACM Transactions Embedded Computing Systems (ACM TECS), and the IEEE Transactions on Computer Aided Design (IEEE TCAD). Previously he has served as the program chair of CODES+ISSS 2017 and 2018, LCTES 2019, and chair of the Design and Applications track of RTSS 2020.

Affiliation(s)

Arizona State University

United States

ESL Associate Editors

Alfredo Arnaud

Universidad Católica del Uruguay

Uruguay

9 (Latin America)

Takuya Azumi

Saitama University

Japan

10 (Asia and Pacific)

Ganapati Bhat

Washington State University

United States

Anupam Chattopadhyay

Associate Professor

Nanyang Technological University

Singapore

10 (Asia and Pacific)

Catherine Gebotys

University of Waterloo

Canada

7 (Canada)

Swaroop Ghosh

Pennsylvania State University

United States

2 (Eastern U.S.)

Swaroop Ghosh

2 (Eastern U.S.)

Biography

Swaroop Ghosh received the B.E. (Hons.) from IIT, Roorkee, India, the M.S. degree from the University of Cincinnati, Cincinnati, and the Ph.D. degree from Purdue University, West Lafayette. He is an Assistant Professor at Penn State University. Earlier, he was with the faculty of University of South Florida. Prior to that, he was a Senior Research and Development Engineer in Advanced Design, Intel Corp. At Intel, his research was focused on low power and robust embedded memory design in scaled technologies. His research interests include low-power circuits, hardware security, quantum computing and digital testing for nanometer technologies.

Dr. Ghosh served as Associate Editor of the IEEE Transactions On Computer-Aided Design (2019-) and IEEE Transactions On Circuits and Systems I (2014-2015) and as Senior Editorial Board member of IEEE Journal of Emerging Topics on Circuits and Systems (JETCAS) (2016-2018). He served as Guest Editor of the IEEE JETCAS (2015-2016) and IEEE Transactions On VLSI Systems (2018-2019). He has also served in the technical program committees of ACM/IEEE conferences such as, DAC, ICCAD, CICC, DATE, ISLPED, GLSVLSI, Nanoarch and ISQED. He served as Program Chair of ISQED (2019) and DAC Ph.D. Forum (2016) and track (co)-Chair of CICC (2017-2019), ISLPED (2017-2018) and ISQED (2016-2017).

Dr. Ghosh is a recipient of Intel Technology and Manufacturing Group Excellence Award in 2009, Intel Divisional Award in 2011, Intel Departmental Awards in 2011 and 2012, USF Outstanding Research Achievement Award in 2015, College of Engineering Outstanding Research Achievement Award in 2015, DARPA Young Faculty Award (YFA) in 2015, ACM SIGDA Outstanding New Faculty Award in 2016, YFA Director’s Fellowship in 2017, Monkowsky Career Development Award in 2018, Lutron Spira Teaching Excellence Award in 2018 and Dean's Certificate of Excellence in 2019. He is a Senior Member of the IEEE and the National Academy of Inventors (NAI), and, Associate member of Sigma Xi.

Affiliation(s)

Pennsylvania State University

United States

Dip Goswami

Eindhoven Univesity of Technology

Netherlands

8 (Africa, Europe, Middle East)

Aritra Hazra

IIT Kharagpur

India

10 (Asia and Pacific)

Annelie Heuser

CNRS

France

8 (Africa, Europe, Middle East)

Jingtong Hu

University of Pittsburgh

United States

2 (Eastern U.S.)

Reiley Jeyapaul

ARM

United States

5 (Southwestern U.S.)

John Jose

IIT Guwahati

India

10 (Asia and Pacific)

Ramesh Karri

New York University

United States

1 (Northeastern U.S.)

Ramesh Karri

1 (Northeastern U.S.)

Biography

Ramesh Karri is a Professor of Electrical and Computer Engineering at Tandon School of Engineering, New York University. He has a Ph.D. in Computer Science and Engineering, from the University of California at San Diego. His research and education activities span hardware cybersecurity including trustworthy ICs, processors and cyber-physical systems; security-aware computer-aided design, test, verification, validation and reliability; nano meets security; metrics; benchmarks; hardware cybersecurity competitions; additive manufacturing security.

He has over 200 journal and conference publications including tutorials on Trustworthy Hardware in IEEE Computer (2) and Proceedings of the IEEE (5). His groups work on hardware cybersecurity was nominated for best paper awards (ICCD 2015 and DFTS 2015) and received awards at conferences (ITC 2014, CCS 2013, DFTS 2013 and VLSI Design 2012) and at competitions (ACM Student Research Competition at DAC 2012, ICCAD 2013, DAC 2014, ACM Grand Finals 2013, Kaspersky Challenge and Embedded Security Challenge).

He was the recipient of the Humboldt Fellowship and the National Science Foundation CAREER Award. He is the area director for cybersecurity of the NY State Center for Advanced Telecommunications Technologies at NYU-Poly; Co-founded the NYU Center for CyberSecurity -CCS (cyber.nyu.edu), co-founded the Trust-Hub (trust-hub.org/) and founded and organizes the Embedded Security Challenge, the annual red team blue team event at NYU, (www.nyu.edu/csaw2016/csaw-embedded).

He co-founded the IEEE/ACM Symposium on Nanoscale Architectures (NANOARCH). He served as program/general chair of conferences including IEEE International Conference on Computer Design (ICCD), IEEE Symposium on Hardware Oriented Security and Trust (HOST), IEEE Symposium on Defect and Fault-Tolerant Nano VLSI Systems (DFTS) NANOARCH, RFIDSEC 2015 and WISEC 2015. He serves on several program committees (DAC, ICCAD, HOST, ITC, VTS, ETS, ICCD, DTIS, WIFS).

He was the Associate Editor of IEEE Transactions on Information Forensics and Security (2010-2014), IEEE Transactions on CAD (2014-present), ACM Journal of Emerging Computing Technologies (2007-present), ACM Transactions on Design Automation of Electronic Systems (2014-present), IEEE Access (2015-present), IEEE Transactions on Emerging Technologies in Computing (2015-present), IEEE Design and Test (2015-present) and IEEE Embedded Systems Letters (2016-present). He served as an IEEE Computer Society Distinguished Visitor (2013-2015). He is on the Executive Committee of IEEE/ACM Design Automation Conference initiating and leading the [email protected] initiative (2014-2017). He has delivered invited keynotes, talks, and tutorials on Hardware Security and Trust (ESRF, DAC, DATE, VTS, ITC, ICCD, NATW, LATW, CROSSING etc).

Affiliation(s)

New York University

United States

Srinivas Katkoori

University of South Florida

United States

3 (Southeastern U.S.)

Website

Srinivas Katkoori

3 (Southeastern U.S.)

Website

Biography

Srinivas Katkoori is a Computer Science and Engineering faculty at the University of South Florida (USF), Tampa, FL. His research group is actively conducting research on related topics such as low power digital VLSI design, reliable system design, Internet-of-Things (IoT), smart embedded systems, smart transportation, smart healthcare, etc. Dr. Katkoori has directed 16 doctoral dissertations and 41 Master’s Theses in the general discipline of Embedded Systems Design and Optimization. Dr. Katkoori serves on technical committees of several VLSI and embedded conferences and is a peer reviewer for many smart embedded systems journals and conferences. To date, he published over 130 peer-reviewed journal and conference papers. Four papers he has co-authored were nominated for best paper awards at 2003 ASP-DAC, 2014 IFIP/IEEE VLSI SOC, 2019 AsianHOST, and 2020 IEEE iSES conferences. One paper he co-authored is recognized with the best paper award at the 2020 IEEE iSES symposium. Among notable professional service, Dr. Katkoori served on ACM SIGDA Board (2010-2013) as Treasurer, as an Associate Editor of IEEE Transactions on VLSI (2006-10), and since 2015, he is serving as the vice-chair of IFIP Working Group 10.5 on Design and Engineering of Electronic Systems. Dr. Katkoori served as the General Chair of the 2019 2nd IFIP IoT Conference and the 2020 IEEE International Symposium on Smart Electronic Systems. Dr. Katkoori received his Ph.D. degree from the University of Cincinnati in 1998. He is a Senior Member of ACM and IEEE. As of Dec 2020, per Google Scholar, his research publications had 1966 citations, with an h-index of 22, and i10-index of 45.

Affiliation(s)

University of South Florida

United States

Soontae Kim

Korea Advanced Institute of Science & Technology

South Korea

10 (Asia and Pacific)

Akash Kumar

Technische Universität Dresden

Germany

8 (Africa, Europe, Middle East)

Akash Kumar

8 (Africa, Europe, Middle East)

Biography

On 29 September 2015, the native of India scientist Akash Kumar received the certificate of appointment from the Technical University of Dresden. The multiprocessor systems expert is now full professor of TU Dresden and the fourth appointed Strategic Professor of cfaed where he holds the Chair for Processor Design. In summer 2015, Prof. Kumar already spent a two-month research stay at TU Dresden. This period was a useful stepping stone for him to get familiar with his future workplace and to build up first scientific contacts and networks.

Akash Kumar received his Ph.D. degree in electrical engineering in the area of embedded systems from National University of Singapore (NUS) joint with Eindhoven University of Technology, Netherlands. From 2009, he was affiliated with the Department of Electrical and Computer Engineering at NUS and starting 2011 he worked there as an Assistant Professor. During that period, Prof. Kumar has published over 60 papers in leading international electronic design automation journals and conferences.

The focus of his current research lays on designing predictable multi‐processor systems – predictable in terms of both the architecture and the applications. Multiprocessor systems‐on‐chip (MPSoCs) have been proposed as a solution to rising power of modern embedded systems. These systems are becoming increasingly heterogeneous with use of dedicated IP blocks and application domain specific processors. To achieve high performance in such systems, the limited computational resources must be shared. The concurrent execution of dynamic applications on shared resources is a potential source of interference. Modelling and analyzing this interference is a key to building cost‐effective systems which can deliver the desired performance of the applications.

Affiliation(s)

Technische Universität Dresden

Germany

Jingwen Leng

Shanghai Jiaotong University

China

10 (Asia and Pacific)

Luciana De Micco

UNMDP

Argentina

9 (Latin America)

Francesca Palumbo

University of Sassari

Italy

8 (Africa, Europe, Middle East)

Francesca Palumbo

8 (Africa, Europe, Middle East)

Biography

She is currently an assistant professor at the University of Sassari, within the Information Engineering unit of the Department of Political Sciences, Communication Sciences and Information Engineering.
She received her summa cum laude “Laurea Degree” in Electronic Engineering in 2005 at the University of Cagliari, then attended the Master Advanced in Embedded System Design in 2006 at the Advanced Learning and Research Institute of the University of Lugano before starting her Ph.D. in Electronic and Computer Engineering at the University of Cagliari.
Her research focus is related to reconfigurable systems and to code generation tools and design automation strategies for advanced reconfigurable hardware architectures. For her studies in the fields of dataflow-based programming and hardware customization, she received two Best Paper Awards at the Conference on Design and Architectures for Signal and Image Processing, respectively in 2011 and in 2015, with the works entitled “The Multi-Dataflow Composer tool: A runtime reconfigurable HDL platform composer” and “MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation”. Dr. Palumbo serves in several different Technical Committee of international conferences and she is a permanent Steering Committee Member of the ACM Conference on Computing Frontiers and Associate Editor of the Springer Journal of Signal Processing Systems.
At the moment, Dr. Palumbo is the scientific coordinator of the CERBERO (ID: 732105) H2020 European Project on Smart Cyber Physical System Design.

Affiliation(s)

University of Sassari

Italy

Priyadarshini Panda

Yale University

United States

6 (Western U.S.)

Partha Pratim Pande

Washington State University

United States

6 (Western U.S.)

Partha S. Roop

University of Auckland

New Zealand

10 (Asia and Pacific)

Debayan Roy

Huawei

Germany

8 (Africa, Europe, Middle East)

Ruben Salvador

CentraleSupelec

France

Donatella Sciuto

Politecnico di Milano

Italy

8 (Africa, Europe, Middle East)

Namita Sharma

Intel

India

10 (Asia and Pacific)

Ozgur Sinanoglu

New York University Abu Dhabi

United Arab Emirates

8 (Africa, Europe, Middle East)

Ozgur Sinanoglu

8 (Africa, Europe, Middle East)

Biography

Ozgur Sinanoglu is a professor of electrical and computer engineering at New York University Abu Dhabi. He earned his BS degrees, one in Electrical and Electronics Engineering and one in Computer Engineering, both from Bogazici University, Turkey in 1999. He obtained his MS and PhD in Computer Science and Engineering from University of California San Diego in 2001 and 2004, respectively. During his PhD, he won the IBM PhD fellowship award twice. He has industry experience at Texas Instruments, IBM, and Qualcomm, and has been with NYU Abu Dhabi as an assistant professor during 2010-2014, associate professor with tenure during 2014-2018, and full professor with tenure since 2018.

Professor Sinanoglu’s research interests include design-for-test, design-for-security, and design-for-trust for VLSI circuits, where he has more than 170 conference and journal papers, and 20 issued and pending US Patents. He is the recipient of the best paper awards at IEEE VLSI Test Symposium 2011 and ACM Conference on Computer and Communication Security 2013. Sinanoglu has given around two dozen tutorials on hardware security and trust in leading CAD and test conferences, such as DAC, DATE, ITC, VTS, ETS, ICCD, ISQED, etc. He is serving or has served as general/program/track/topic chair or technical program committee member in about 20 conferences, and as (guest) associate editor for IEEE TIFS, IEEE TETC, IEEE TCAD, ACM JETC, Elsevier MEJ, JETTA, and IET CDT journals. He chaired and hosted the top cybersecurity conference in Asia, ACM ASIACCS 2017, in Abu Dhabi.

Professor Sinanoglu is the director of the Design-for-Excellence Lab at NYU Abu Dhabi. His recent research in hardware security and trust has been funded by US National Science Foundation, US Department of Defense (Army Research Office and DARPA), Intel Corporation, Semiconductor Research Corporation, and Mubadala Technology.

Affiliation(s)

New York University Abu Dhabi

United Arab Emirates

Amit Singh

University of Essex

United Kingdom

8 (Africa, Europe, Middle East)

Mirjana Stojilovic

EPFL

Switzerland

8 (Africa, Europe, Middle East)

Hiroyuki Tomiyama

Ritsumeikan University

Japan

10 (Asia and Pacific)

Rasit Topaloğlu

IBM Research

United States

1 (Northeastern U.S.)

Mengying Zhao

Shandong University

China

10 (Asia and Pacific)

ESL Advisory Board

Tarek Abdelzaher

University of Illinois, Urbana Champaign

United States

4 (Central U.S.)

Nikil Dutt

University of California, Irvine

United States

6 (Western U.S.)

Jack Ganssle

Ganssle Group

United States

2 (Eastern U.S.)

Hermann Kopetz

Vienna University of Technology

Austria

8 (Africa, Europe, Middle East)

Hermann Kopetz

8 (Africa, Europe, Middle East)

Biography

Hermann Kopetz received his PhD in physics “sub auspiciis praesidentis” from the University of Vienna, Austria in 1968. After a two-year period as a Post Doc and Assistant Professor at the University of Georgia in Athens, GA, he joined industry in Austria in 1970, serving as a manager of the computer process control department at Voest Alpine in Linz, from 1972-1978. In 1978 he accepted an appointment as a Professor for Computer Process Control at the Technical University of West-Berlin. Since 1982 he is Professor for Software Engineering and Real-Time Systems at the Vienna University of Technology. From 1990 to 1992 Kopetz was chairman of the IEEE Technical Committee on Fault-Tolerant Computing and was elected to the grade of a “Fellow of the IEEE” in 1993. Dr. Kopetz was the Chairman of the IFIP WG 10.4 on Dependable Computing and Fault-Tolerance from 1996 to 1998. In 1998 he was elected to become a full member of the Austrian Academy of Science. In July 2000 Dr. Kopetz was nominated by the Austrian Government to become one of the eight scientists to advise the Austrian Government on Science Policy. Dr. Kopetz has published a widely used textbook on Real-Time Systems and more than 100 papers on the topic of embedded systems. He holds more than twenty patents in the area of dependable real-time systems.

Kopetz’s research interests focus on the intersection of real-time systems, fault-tolerant systems, and distributed embedded systems. He is the chief architect of the Time-Triggered Protocol and the Time-Triggered Architecture which evolved over the past twenty-five years of research. In his research, he has always considered that the progression of real-time is an essential property of reality and, as a consequence, must take a central role in the specification and design of dependable embedded systems. In his view, the removal of real-time from many theories and models of computation is a profound mistake. Many fundamental problems of computer science, such as the meta-stability problem, the mutual exclusion problem or the deterministic ordering problem of messages in a distributed system are caused by simultaneity, which is a problem of timing. If a proper representation of real-time, such as his sparse time, is included in a system model, then the solutions to these problems become simpler. In the past few years, Kopetz’s ideas have been taken up by a wider academic and industrial research community and gave rise to the development of the field of time-triggered real-time systems.

Affiliation(s)

Vienna University of Technology

Austria

Mahesh Mehendale

Texas Instruments

United States

10 (Asia and Pacific)

Krithi Ramamritham

Indian Institute of Technology, Bombay

India

10 (Asia and Pacific)

Marilyn Wolf

University of Nebraska Lincoln

United States

5 (Southwestern U.S.)