Current EDA Opportunities:


 

IC Package System Designer for AI chips | Qualcomm Technologies, Inc.

Institution:
Qualcomm Technologies, Inc.
Job Location:
California: San Diego and San Jose
Posted:
Position:
IC Package System Designer for AI chips
Description:

Qualcomm is a company of inventors that unlocked 5G ushering in an age of rapid acceleration in connectivity and new possibilities that will transform industries, create jobs, and enrich lives. But this is just the beginning. It takes inventive minds with diverse skills, backgrounds, and cultures to transform 5Gs potential into world-changing technologies and products. This is the Invention Age and this is where you come in. The IC Package Architecture and Design Team at Qualcomm has an opening for an experienced package Design Engineer for AI chips. This team is responsible for road mapping, architecture, design methodology, design implementation and verification for all Qualcomm package products. Team is looking for experienced packaging/system engineer who can own the packaging roadmap for AI packages and can select and define the package and design substrates for flip-chip designs for AI packages.

  • Select the IC package type /area/ based on IC requirements/cost requirements/ based on requirements for footprint, mechanical, thermal and electrical performance with the goal to achieve lowest system-level cost
  • Design the IC package pinmap and release the substrate for IC package design for manufacturing
  • Work with IC teams to define the bump patterns based on die-level floor plan and macroblock placement
  • Perform Signal integrity/ PDN/ analysis for the IC package
  • Review different SIP/Module partition experience
  • Partner with Packaging suppliers and review their roadmap to pitch the best package technology for the AI roadmap
  • Define package roadmap for future generation of AI packages based on industry survey/IC roadmap/memory partitioning

Minimum Qualifications

  • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field.
  • 7+ years Hardware Engineering experience or related work experience.

Preferred Qualifications

  • 7 to 15 years of IC package design or PCB design and/or modeling experience
  • Hands on experience with Cadence SIP and/or Mentor Xpedition.
  • Knowledge of assembly and substrate manufacturing processes
  • Fundamental understanding of Signal Integrity and PDN. Pkg/PCB SI/PI modeling, co-simulation and analysis experience is a plus.
  • Familiar with PCB design and or stackup and breakout constraints
  • Experience in schematic capture, layout and design using Cadence Allegro/Mentor Schematic Design - Entry (Concept HDL) design tools is a plus

Education Requirements

  • Master's/PhD is preferred

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or any other protected classification.

If you need an accommodation during the application/hiring process, you may request an accommodation by sending an email to [email protected].

Manager Software Development - Test Automation | The Amazon Development Center

Institution:
The Amazon Development Center
Job Location:
Dresden
Posted:
Position:
Manager Software Development - Test Automation
Description:

In 2013 Amazon expanded to Dresden with it being the home-base of the Amazon Development Center team. The Kernel and Operating System team creates the heart of EC2, the actual virtual compute instance definitions and Amazon Linux, the operating system for our cloud. Being part of Amazon means constantly driving innovation and working on complex technical challenges every day.

Check out this video to see what the office looks like and how beautiful the Dresden area is.

If you have passion for people management, solid technical knowledge, automation background and want to build solutions to challenging problems that directly affect millions of people: there may be no better place than Amazon for you to impact the world!

Basic Qualifications

  • You have managed an engineering team before
  • You have deep knowledge of software testing methodologies, CI/CD, and automation best practices
  • You have solid background in load and performance testing
  • You have years of industry experience in Linux environments

Preferred Qualifications

  •  You are proficient in project management
  • Experience in building scalable web services
  • Strong customer and quality focus and strong bias for action<
  • Self-motivated and strong desire to invent and simplify
  • History of delivering results
  • Good understanding of Virtualization

Protecting your privacy and the security of your data is a longstanding top priority for Amazon. Please consult our Privacy Notice to know more about how we collect, use and transfer the personal data of our candidates.

Conformal Field Application Engineer | Cadence

Institution:
Cadence
Contributor:
Posted:
Position:
Conformal Field Application Engineer
Description:

Job Description Summary

  • Application Engineer (AE) is expected to be fluent in Formal Verification with a keen desire to do work on Complex design verification and logic synthesis for State-of-the-Art designs. 
  • Manage strategic customer evaluations/benchmarks on Cadence’s Conformal verification solutions to establish technology differentiation and assert Cadence competitive advantages. 
  • Assist customers with adopting Cadence Front End tools in Formal Verification with Conformal LEC, Conformal ECO Designer, Conformal Low power, and Conformal Constraint Designer. 
  • Drive best practices and lessons learnt from evaluations/benchmarks and customer interactions back in to product development and Cadence field engineers.
  • Develop an understanding of the customer's needs and also of the competition's technology and sales strategies. 
  • Support regional customers and support major level customer in the local region.
  • Perform methodology assessments, improve existing design methodologies, and develop new ones that leverage Cadence technology and services. 
  • Assists sales staff in assessing potential application of company product to meet customer needs and preparing detailed product specifications.  
  • Create and conduct technical presentations and product demonstrations to customers. 

Requirements:

  • MSEE, or equivalent required with 3+ years of experience, or BSEE or equivalent with 5+ years of experience.
  • Design experiences should include SoC design using Verilog/System Verilog/VHDL, Functional Verification, Formal Verification, and Logic Synthesis.
  • Experiences in other SoC design activities such as low power design and verification with UPF or CPF, STA, DFT, Functional ECO, and physical design are strongly desired.
  • Excellent verbal and written communication skills are highly desirable. Customer sensitivity, the ability to multitask, set priorities, have a helpful attitude towards customers, and the desire to help customers exploit new technologies are essential for success in this position.

 

Software Engineer Intern | Intel

Institution:
Intel
Contributor:
Posted:
Position:
Software Engineer Intern
Description:

Job Description

Responsibilities may be quite diverse of a technical nature. U.S. experience and education requirements will vary significantly depending on the unique needs of the job. Job assignments are usually for the summer or for short periods during breaks from school.

Primary Location: Phoenix, AZ US

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Experience would be obtained through a combination of prior education level classes, and current level school classes, projects, research and relevant previous job and/or internship experience.

Minimum Qualifications:

  • Be pursuing an M.S. or PhD. in Computer science.

Preferred Qualifications:

6 months of experience in:

  • Computational geometry algorithms.
  • Machine Learning to Substrate/PCB designs.
  • C++, C, Data structures, Python, ML frameworks.
  • Cadence/mentor CAD tools.

Inside this Business Group

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world-class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.