The IEEE CEDA System Validation and Debug Technology Committee (SVDTC) brings together passionate experts from Industry and Academia globally, in order to collaboratively address the Industry needs in and around the technology of System validation and Debug (SVD) for silicon-based information and communication systems -- from soup to nuts.
- Form a global technology body focusing on system validation and debug of silicon-based computing and communication chips/platforms-- from soup to nuts. Both functional and electrical validation are in scope. Note that this complements Test Technology which focuses primarily on manufacturing defects, Mfg. Test and associated technologies.
- Debug, in Post-silicon or Pre-silicon systems, is an essential phase and aspect of system validation, where the silicon system encompasses hardware/silicon, firmware, and system software.
- Both Industry experts and collaborating academicians are brought together as partners in this effort which, we hope, will lead to a vibrant, effective Industry body.
- Take on large issues that are deemed beneficial to multiple partner organizations, institutions and thus have an industry-level impact to the eco system. Think Standards, Specifications, Tools, and Problem definitions & sharing
- Help develop System Validation & Debug (SVD) curriculum to foster & promote the academic discipline
|Nicola Nicolici||McMaster University||Vice Chair|
|Chinna Prudvi||Intel Corp.||Secretary|
|Flavio de Paula||IBM||Vice chair for Publicity & Communication|