Edith Beigné joined CEA-LETI MINATEC in 1998 first working on RFID systems for biomedical applications. She focused then on asynchronous systems and circuits specifically for ultra-low power mixed-signal systems and cryptographic circuits. Since 2005, she is in charge of the low power design team within the digital laboratory developing fine-grain power control and local voltage and frequency scaling innovative features. Since 2009, her main focus is to manage power and variability issues in advanced technology nodes for high energy efficiency. She was leading complex innovative SoC design in 65nm, 32nm bulk and now in 28nm and 14nm FDSOI technologies for adaptive voltage and frequency scaling architecture based on GALS structures. Her main focus today is automatic performance regulations for ultra-low power circuits. She is part of ISSCC, ICCAD, ISLPED, DATE and ASYNC committees and JSSC editor.