JxCDC Call for Special Topic on Tunneling FETs for Energy-Efficient Computing & Information Processing

announcement | Mon, Apr 27th, 2020

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The Tunneling Field-Effect Transistor (T-FET) is considered a future transistor option due to its steep-slope prospects and the resulting advantages in operating at low supply voltage (VDD). 

Reducing supply voltage (VDD) while keeping a low leakage current and a reasonably high oncurrent is critical for minimizing energy consumption and improving the energy efficiency of computing and information processing. The thermal limit (Boltzmann’s Tyranny) of the MOSFET transistor subthreshold swing (SS) restricts lowering its threshold voltage (Vt), causing significant performance degradation at low VDD. A Tunneling Field Effect Transistor’s (T-FET) SS is not limited by this thermal tail and may perform better at low VDD.

Since the first experimental proof of subthreshold swing (SS) < 60mV/dec, T-FET’s prospects have attracted the interest of researchers. Silicon’s large indirect bandgap and large carrier mass prevents Si T-FET from achieving high drive currents. But due to the availability of high-quality material together with years of know-how, Si and Si/Ge T-FETs have been studied initially and showed the first of many devices with SS < 60mV/dec. III-V materials for T-FETs attracted attention next because of their low bandgap and carrier mass. While more challenging to fabricate, the broken bandgap hetero-junctions III-V T-FETs eventually showed the highest T-FET drivecurrent. Beyond III-V materials, Transition Metal Dichalcogenide and other 2D materials may provide a path in the future to high-performance energy-efficient transistors, thanks to thinner channels enabling better control of the tunneling field.

This call for papers on Tunneling FETs is for rapid publication of seminal results across the areas of T-FET materials, devices, and circuits for novel computation and information processing paradigms. Paper submissions with key insights into the advantages and challenges of specific TFET device and material designs and circuit techniques are especially valued in order to guide the semiconductor industry and academia on a path toward more energy-efficient computing.

Topics of Interest

Special Topic on Tunneling Field Effect Transistors (Tunneling FETs, T-FETs)

  • N- and P- Tunneling FET experimental transistors demonstrating high performance at low supply voltage
  • T-FET material and device design, including hetero-junction III-V materials, transition metal dichalcogenides, other two-dimensional materials and their hetero-junctions
  • T-FET circuits for energy efficient computing and information processing
  • Energy-Efficient computing and information processing with T-FET transistor circuits and architectures.
Important Dates
  • Open for Submission: April 15, 2020
  • Submission Deadline: June 30, 2020
  • First Notification: August 1, 2020
  • Revision Submission: August 21, 2020
  • Final Decision: September 30, 2020
  • Publication Online: December 1, 2020

View the full Call for Papers