The Design Automation Conference (DAC) is the premier event devoted to the design and design automation of electronic chips and systems. DAC focuses on the latest methodologies and technology advancements in electronic design.  The 59^th DAC  will provide a number of opportunities for students and early career professionals to make the connections they need to jumpstart their career in electronic design and automation.

Ph.D Forum at DAC

The Ph.D. Forum at the DAC is a poster session hosted by ACM SIGDA for Ph.D. students to present and discuss their dissertation research with people in the EDA community. It has become one of the premier forums for Ph.D. students in design automation to get feedback on their research and for the industry to see academic work in progress: hundreds of people attended the last forums. Participation in the forum is competitive with an acceptance rate of around 30%. Limited funds will be available for travel assistance, based on financial needs. The forum is open to all members of the design automation community and is free of charge. It is co-located with DAC to attract the large DAC audience, but DAC registration is not required in order to attend this event.

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After two virtual years, the DAC Young Fellows program will return *IN PERSON* in July 2022! Are you a student who would like to attend the 59th Design Automation Conference in beautiful San Francisco? Would you like to learn all about EDA, the electronic design ecosystem while networking with like-minded individuals? The DAC Young Fellow Program is your opportunity!

As a DAC Fellow, you will receive a free DAC full-conference registration. In addition, DAC will issue grants of up to $1200 to cover travel expenses, subject to matching funds from your advisor or university for the remainder. The program includes live interaction with experts from large EDA companies, hands-on labs, career coaching, a summer school, fun contests and much more. The DAC Young Fellows Program is funded by the Design Automation Conference with generous support from Cadence Design Systems and Synopsys Inc.

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[email protected] is a hardware security challenge contest, co-located with the Design and Automation Conference (DAC), for finding and exploiting security-critical vulnerabilities in hardware and firmware. In this competition, participants compete to identify the security vulnerabilities, implement the related exploits, propose mitigation techniques or patches, and report them. The participants are encouraged to use any tools and techniques with a focus on theory, tooling, and automation.

The contest mimics real-world scenarios where security engineers have to find vulnerabilities in the given design. The vulnerabilities are diverse and range from data corruption to leaking sensitive information leading to compromise of the entire computing platform. The open-source SoC riddled with security vulnerabilities has been co-developed by Intel, the Technical University of Darmstadt, and Texas A&M University. [email protected] has been successfully running since 2018 with several hundred contestants from academia and industry. 

The winners of the competition will be honored in person at the DAC award ceremony July 10-14, 2022 at Moscone West Center, San Francisco, Calif. 

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The DAC System Design Contest focuses on low-power object detection on an embedded FPGA system. Contestants will receive a training dataset provided by DJI, and a hidden dataset will be used to evaluate the performance of the designs in terms of accuracy and power. Contestants will compete to create the best performing design on a Ultra 96 v2 FPGA board. Grand cash awards will be given to the top three teams. The award ceremony will be held at the 2022 IEEE/ACM Design Automation Conference.

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The P.O. Pistilli Scholarship is funded by the Design Automation Conference and it is directed by the Association for Computing Machinery (ACM) Special Interest Group on Design Automation (SIGDA).

Scholarships of $4000 per year, renewable for up to 5 years, are awarded annually to 2-7 high school seniors from the above-mentioned under-represented groups who have a 3.00 GPA or better (on a 4.00 scale), have demonstrated high achievement in math and science courses, have expressed a strong desire to pursue careers in electrical engineering, computer engineering, or computer science, and who have demonstrated substantial financial need.

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