Catherine Gebotys

Catherine Gebotys

Catherine Gebotys

IEEE Region: 7 (Canada)


Catherine H. Gebotys is a Professor in the Department of Electrical and Computer Engineering at the University of Waterloo, as well as the Associate Chair for Graduate Studies. She is also the Deputy Editor-in-Chief of the Institute of Electrical and Electronics Engineers (IEEE) Embedded Systems Letters, as well as an Associate Editor for DAES the Springer Verilag Journal.

Her current research interests include embedded systems security, side-channel analysis for secure devices, security countermeasures for cryptographic algorithms, and countermeasures for hardware hacking – side channel, fault injection, microprobing, and reverse engineering.

Professor Gebotys is the sole inventor of several patents and has also received numerous awards, including the CITO Champions of Innovation Award. In addition, she has collaborated with several companies including DRDC, XtremeEDA, Blackberry, Motorola, ViXS, and COMDEV.

Professor Gebotys has published a number of research papers in the areas of side-channel analysis, embedded security, applied optimization for high-level hardware and software synthesis. She is the author of Security in Embedded Devices, as well as the co-author of Optimal VLSI Architectural Synthesis: area, performance and testability.

Positions & Affiliations

University of Waterloo