Taewhan Kim is a Professor at the Department of Electrical and Computer Engineering in Seoul National University, South Korea. He is also a head of Intelligent Semiconductor System Division at the School of Transdisciplinary Innovations. He has published over 300 papers in IEEE/ACM journals and conferences in the area of high-level synthesis, logic synthesis, dynamic voltage scaling, clock network synthesis, and physical design. For the last 7 years, his research has  focused on establishing EDA methodologies for standard cell layout synthesis and design technology co-optimization targeting nanosheet and complementary FET technologies. He served general chairs of IEEE RTCAS in 2007 and of IEEE/ACM ASP-DAC in 2024, and has been serving on Associate Editors of Integration-VLSI Journal over 15 years. He obtained his PhD degree in Computer Science from the University of Illinois at Urbana-Champaign, and his MS and BS degrees from Seoul National University.