Zhe Lin is an Associate Professor with the School of Integrated Circuits, Sun Yat-sen

University, China. Previously, he was an Associate Research Fellow with Peng Cheng

Laboratory, China. He received the B.S. degree from the School of Electronic Science

and Engineering, Southeast University, China, in 2014, and the Ph.D. degree from the

Department of Electronic and Computer Engineering at Hong Kong University of Science

and Technology, Hong Kong, China, in 2020. His research interests cover FPGA-based

front-end design automation, hardware-software co-design, and heterogeneous

computing systems. He was a recipient of the Best Paper Award Nomination at ICCD

2024 (3/276), DATE 2022 (24/732) and FCCM 2019 (5/120).