IEEE TCAD Donald O. Pederson Award Announcement
The IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) Donald O. Pederson Best Paper Award has two winning papers in 2024!
The IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) Donald O. Pederson Best Paper Award (BPA) is sponsored by CEDA and recognizes the best paper published in IEEE TCAD in the last two years previous to the corresponding year when the award is given. This award is based on the research's overall quality, originality, contribution level, subject matter, and timeliness. A full list of previous winners can be found here.
The IEEE Council on Electronic Design Automation (CEDA) is excited to announce the 2024 IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award winners. This year, two different papers have been equally recognized by the IEEE TCAD BPA Selection Committee:
"PACT: An Extensible Parallel Thermal Simulator for Emerging Integration and Cooling Technologies" by Zihao Yuan, Prachi Shukla, Sofiane Chetoui, Sean Nemtzow, Sherief Reda, and Ayse K. Coskun, which was published in IEEE TCAD, vol. 41, no. 4, pp. 1048-1061, April 2022.
This work introduces a new SPICE-based parallel compact thermal simulator (PACT) that achieves fast and accurate standard cell to architecture-level thermal modeling. The key features include steady-state and transient parallel thermal simulations. PACT utilizes the advantages of multicore processing (OpenMPI), which can be executed on cloud systems and includes several solvers to speed up steady-state and transient simulations. Also, PACT has a very low maximum error with respect to state-of-the-art tools (2.77% for steady-state simulations and 3.28% for transient thermal simulations). Moreover, an essential part of PACT innovation is its applicability and capability to model emerging integration and cooling technologies, such as monolithic 3-D integrated circuits (IC) and full-system simulation integration on 2.5-3D systems with silicon-Photonic Network-on-Chips (PNoCs).
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"An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs" by Steven Herbst, Gabriel Rutsch, Wolfgang Ecker, and Mark Horowitz, which was published in IEEE TCAD, vol. 41, no. 7, pp. 2223-2236, July 2022.
This work presents a new open-source framework for emulating mixed-signal chip designs on a field-programmable gate array (FPGA). It includes a Python-based synthesizable model generator for mixed-signal blocks, a fixed-point and floating-point synthesizable System Verilog library for representing real numbers, and a Python-based tool that generates emulator control infrastructure and automates the FPGA build process. The novel framework includes features for efficiently modeling analog dynamics, nonlinearity, and noise, often using compile-time caching to reduce the required computational resources of the FPGA. This framework makes it easy to emulate complex analog and mixed-signal systems while providing runtimes of up to 3 orders of magnitude faster than CPU simulations with real-number functional models.
The TCAD BPA Selection Committee recognized both papers for their great potential to move forward in critical areas of CAD and EDA for the latest nanoscale IC and many-core systems.
The authors will receive the award at the IEEE/ACM Design Automation Conference (DAC) 2024 on Thursday, June 27th, 2024, during the awards ceremony at 8:45 am at the Moscone Center in San Francisco, CA, USA. Please join us in congratulating these authors on this achievement!
TCAD Editor-in-Chief