IEEE JxCDC: Call for Papers

IEEE JxCDC is soliciting submissions for its Special Topic on 3D Heterogeneous Integration for Energy-Efficient AI Systems.

This special topic of the IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (JXCDC) focuses on artificial intelligence systems and architectures enabled by three-dimensional heterogeneous integration (3DHI). As AI system energy and performance are increasingly constrained by data movement, memory access, and interconnect bandwidth, 3DHI provides a complementary approach through vertical integration of logic, memory, sensors, and specialized accelerators.

3DHI techniques, including through-silicon vias, hybrid bonding, monolithic 3D integration, interposers, and chiplet-based assemblies, enable tighter component coupling, reduced interconnect energy, and architectural organizations difficult to realize in planar designs. Submissions should emphasize cross-layer co-design across devices, circuits, architectures, and algorithms, clearly articulate performance and energy-efficiency impacts, provide quantitative comparisons to planar baselines where possible, and address mitigation of thermal challenges. Both experimental demonstrations and well-supported modeling or simulation studies are within scope.

Topics of special interest include but are not limited to:

Applications including edge and embedded AI, autonomous and robotic systems, data-center and cloud accelerators, and scientific or sensor-driven AI workloads.
3D Integrated AI Architectures such as logic-on-memory and memory-on-logic accelerators, 3D-stacked memories, monolithic 3D versus TSV-based systems, vertical interconnects, and bandwidth–energy tradeoffs.
Near-Sensor and In-Sensor AI Systems integrating image, LiDAR, radar, and event-based sensors with compute, including system-level evaluation of energy and data-movement reductions.
Heterogeneous Integration with Emerging Devices including analog or mixed-signal compute blocks, resistive, ferroelectric, photonic, or spintronic elements, and reliability and thermal considerations.
Algorithm and Architecture Co-Design for vertically integrated memory hierarchies and communication-aware AI training and inference.
Modeling, Design Automation, and Evaluation frameworks including cross-layer modeling, thermal-aware analysis, and benchmarking methodologies.
Prototype Demonstrations and Case Studies of 3D-integrated AI systems, including silicon implementations and comparisons with planar approaches.
System-Level Challenges including power delivery, thermal management, yield, test, scalability, and chiplet-based integration strategies.

Submission deadline: 15 May 2026

For more information, please visit:
https://sscs.ieee.org/publications/ieee-journal-on-exploratory-solid-state-computational-devices-and-circuits-jcdc/special-issues/special-topic-on-3d-heterogeneous-integration-for-energy-efficient-ai-systems/