Rajesh K. Gupta

Rajesh K. Gupta

University of California, San Diego
IEEE Region
Region 06 (Western U.S.)

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Rajesh K. Gupta (F’91) received the B.Tech. degree in electrical engineering from Indian Institute of Technology Kanpur, Kanpur, India, in 1984, the M.S. degree in EECS from University of California, Berkeley, Berkeley, CA, USA, in 1986, and the Ph.D. degree in electrical engineering from Stanford University, Stanford, CA, USA, in 1994.

He is a Qualcomm Endowed Chair Professor with the Department of Computer Science and Engineering, University of California, San Diego, San Diego, CA, USA. He was a Circuit Designer with Intel Corporation, Santa Clara, CA, USA, as a member of three successful processor design teams and on the Computer Science Faculty, University of Illinois, Urbana-Champaign, Champaign, IL, USA and the University of California, Irvine, Irvine, CA, USA. Regardless of the title, the focus of the research has been on methods and tools to make things better, such as, more energy-efficient and reliable, or enable others (mostly, designers and architects) to do things better. To the extent a problem area requires it, there is a focus on creating usable artifacts or at least find the limits on what is achievable in practice. His past contributions include SystemC modeling and SPARK parallelizing high-level synthesis, both of which have been incorporated into industrial practice. His publications and patents cover various aspects of embedded systems design, design automation, clock design, data-path synthesis, system-on-chip modeling, and dynamic power management. He was a Lead or a Co-Lead of DARPA-sponsored efforts under the data-intensive systems and power-aware computing and communications programs on the role of adaptation in energy-efficient system architectures. His ongoing projects are focused on efficient compositional synthesis of system-chips, microelectronic variability, accurate timing, and synchronization for the integrated systems. His current research interests include embedded,cyber-physical systems, and Internet-of-Things.

Dr. Gupta was a recipient of the Best Demonstration Paper Award at ACM BuildSys’16, the Best Paper Award at IEEE/ACM DCOSS’08, and the Best Demonstration Award at IEEE/ACM IPSN/SPOTS’05 with and his students. He is a fellow of the ACM.

IEEE CEDA Position History:
  • Present   Editor-at-Large Board (Transactions on Computer Aided Design of Integrated Circuits & Systems Editoral Board)
  • Present   Member (Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award Committee)
  • Past   Roundtables (Design&Test Editorial Board)
  • 2018-2021   TCAD EiC (Board of Governors)
  • 2018-2021   EiC (Transactions on Computer Aided Design of Integrated Circuits & Systems Editoral Board)
  • 2018-2021   Member (Publications Committee )
  • 2012-2013   Vice President Publicity (Executive Committee)
  • 2012-2013   Chair (Publicity Committee)
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