Edith Beigne

Technology variability and global environment variations are bringing many constraints on circuits and architectures today making difficult to reach high energy efficiency. After a brief overview of adaptive circuits for low power multi-processors and IoT architectures, the talk will detail new technologies opportunities for more flexibility/adaptivity. Digital and mixed-signal architectures using 3D technologies will be presented in the scope of multi-processors activity as well as imagers and neuro-inspired circuits. Also, the integration of non-volatile memories will be shown in the perspective of new architectures for computing. Finally, embedding learning will be addressed to solve power challenges at the edge and in end-devices: some new design approaches will be discussed.

Today’s sources of variations are affecting a lot circuits’ energy efficiency: this talk will bring innovative technological, circuit and architectural techniques for efficient automatic performance regulation. Given the numerous sources of variations encountered by today’s integrated systems, it becomes very challenging to implement highly energy-efficient circuits. Whether the variations are in the process, in the application needs or in the environmental characteristics, the common solution is an adaptation. This talk is exploring automatic adaptation techniques at architectural applied to MPSoCs as well as autonomous Wireless Sensor Nodes.

With the increasing complexity of today’s MPSoC applications, extremely high performance has become the main requirement. However, high performances do not only mean high speed but also low power. However, most of the time, ultra-low power architectures cannot reach high speed and conversely, at high speed, a lot of power is consumed. Designing Ultra Wide Voltage Range (UWVR) systems at the nanometer regime is a way to achieve high energy efficiency but introduces many challenges due to the emphasis of parasitic phenomenon effects driven by the scaling of bulk MOSFETs, making circuits more sensitive to the manufacturing process fluctuations and less energy efficient. How to improve the trade-off between leakage, variability and speed at low-voltage? Obviously, the trend is to use thin film devices. Undoped thin-film planar FDSOI devices are being investigated in this presentation as an alternative to bulk devices in 28nm node and beyond. This talk will highlight the development of an UWVR multi-VT design platform in FDSOI planar technology on Ultra Thin Body and Box (UTBB) for the 28nm node. The use of an efficient Body Biasing (BB) shows an extremely efficient performance tuning for high-energy efficiency. We will also explore FDSOI benefits for new ULP applications and IoT perspectives.

Asynchronous circuits have characteristics that differ significantly from those of synchronous circuits in terms of their power and robustness to variations. This talk will show how it is possible to exploit these characteristics to design ultra-low power and robust circuits in the scope of the Internet-of-Everything (IoE) and also Globally Asynchronous and Locally Synchronous architectures. More specifically, the aims of the talk are to give fundamentals of asynchronous circuits design and to detail design methodologies with practical low power asynchronous circuits examples. At the end of the talk, attendees should be able to differentiate between the usefulness of an asynchronous circuit compared to a synchronous one according to their application needs.