Paper

Virtual Probe: A Statistical Framework for Low-Cost Silicon Characterization of Nanoscale Integrated Circuits

Volume Number:
30
Issue Number:
12
Pages:
Starting page
1814
Ending page
1827
Publication Date:
Publication Date
1 December 2011

paper Menu

Abstract

In this paper, we propose a new technique, referred to as virtual probe (VP), to efficiently measure, characterize, and monitor spatially-correlated inter-die and/or intra-die variations in nanoscale manufacturing process. VP exploits recent breakthroughs in compressed sensing to accurately predict spatial variations from an exceptionally small set of measurement data, thereby reducing the cost of silicon characterization. By exploring the underlying sparse pattern in spatial frequency domain, VP achieves substantially lower sampling frequency than the well-known Nyquist rate. In addition, VP is formulated as a linear programming problem and, therefore, can be solved both robustly and efficiently. Our industrial measurement data demonstrate the superior accuracy of VP over several traditional methods, including 2-D interpolation, Kriging prediction, and k-LSE estimation.

Country
CHN
Affiliation
Microsoft Research Asia
IEEE Region
Region 10 (Asia and Pacific)
Country
USA
Affiliation
Duke University
IEEE Region
Region 03 (Southeastern U.S.)
Email
Country
USA
Affiliation
Oak Ridge National Laboratory
IEEE Region
Region 03 (Southeastern U.S.)
Email