Large Scale VLSI Mask Optimization

The accelerated evolution of integrated circuit technologies, coupled with escalating design intricacy, presents burgeoning challenges in manufacturability and yield. The lithography process, a linchpin in transcribing design patterns onto silicon, has seen its modeling and simulation costs soar in response to an increasingly complex and variable manufacturing environment. Simultaneously, mask optimization – a critical component of the design process – has become both more pivotal and costly. This talk will explore three interconnected areas: the role of lithography modeling, optical
proximity correction (OPC), and the implementation of large-scale OPC, with particular emphasis on recent advancements in deep learning as a solution to these challenges. Moreover, the talk will focus on the instrumental role deep learning can assume in OPC. We will present a successful application of deep learning within our comprehensive mask optimization framework, demonstrating its potential to significantly enhance the effectiveness and efficiency