Hardware/Software Co-Design for Computing-in-Memory Using Non-Volatile Memory

As Moore's law is approaching to the end, designing specialized hardware along with the software that maps the applications onto that hardware is a promising solution. The peak performance of the hardware design is important, while the software also plays a critical role in determining the actual performance. The recent progress in computing-in-memory (CiM) using non-volatile memory (NVM) demonstrates its potential as a specialized accelerator to enhance energy efficiency, particularly at the edge. It is expected that the hardware/software (HW/SW) co-design can further optimize NVM based CiMs and improve the overall performance. However, the current process for HW/SW co-design in CiM has not been well addressed. Additionally, it is difficult to design and optimize NVM based CiMs due to the huge design space. Thus, in this talk, we will introduce novel co-exploration frameworks for algorithms, CiM architectures and various device options including FeFET, ReRAM, and MRAM. We will showcase how our flexible co-exploration framework, Eva-CiM, broadens the design freedom and advances the Pareto frontier between hardware efficiency and algorithm performance for better design trade-offs. Furthermore, we will present the unified optimization of HW/SW to minimize the impact of intrinsic reliability issues in CiM.