Board of Governors | IEEE Council on Electronic Design Automation

* signifies a non-voting position

President

Gi-Joon Nam

IBM Research

United States

1 (Northeastern U.S.)

President-Elect

L. Miguel Silveira

INESC-ID, IST, Universidade de Lisboa

Portugal

8 (Africa, Europe, Middle East)

Immediate Past President

Yao-Wen Chang

National Taiwan University

Taiwan

10 (Asia and Pacific)

Yao-Wen Chang

10 (Asia and Pacific)

Biography

Yao-Wen Chang received the B. S. degree from National Taiwan University (NTU), Taipei, Taiwan, in 1988, and the M.S. and Ph.D. degrees from the University of Texas at Austin, TX, USA, in 1993 and 1996, respectively, all in computer science. He is currently the Dean of the College of Electrical Engineering and Computer Science and a Distinguished Professor of the Department of Electrical Engineering, NTU. His current research interest lies in electronic design automation, emphasizing physical design and manufacturability. He has co-authored one textbook on EDA (Morgan Kaufmann, 2009) and one research book on routing (Springer, 2007), 17 U.S. patents and seven Taiwan patents, and over 340 ACM/IEEE conference and journal papers in the above areas, including highly cited works on floorplanning, placement, routing, design for manufacturability, heterogeneous integration, and FPGA. He was named among The World’s Top 2% Scientists identified by Stanford University and ranked #1 worldwide among 40K+ researchers by the Microsoft Academy for Recent Five-Year Citations in the Hardware and Architecture Domain during 2011/2012 before the system retired.

Dr. Chang was a recipient of four research awards at the 50th ACM/IEEE Design Automation Conference (DAC) in 2013 for the First Most Papers (34 DAC papers; #1 worldwide) in the Fifth Decade (still the first prolific author in the sixth decade), etc., 2020 ASP-DAC Prolific Author Award, the first place winner of six recent ACM/IEEE contests, 21-time winner of the DAC/ICCAD/ISPD contests, eleven best paper awards (including one from DAC’17), 23 Best Paper Award nominations from DAC/ICCAD/ISPD, etc., the Distinguished Research Award (highest honor) from the Ministry of Science and Technology of Taiwan (three times; retired from this award), the IBM Faculty Awards (three times), the 2020 Distinguished Research Award from the Pan Wen Yuan Foundation, the 2018 Micron Teacher Award, the 2017 TECO Award, and the 2015 MXIC Chair Professorship, two distinguished teaching awards for ten years (the highest honor for top 1% teachers), and nine excellent teaching awards from NTU.

Dr. Chang has served on the Executive Committee of the IEEE Council on EDA (CEDA) since 2012 and was its president 2020/2021. He is a recipient of the 2015 IEEE CEDA Outstanding Service Award and the 2012 ACM Recognition of Service Award. Dr. Chang has served on the editorial boards of the IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, the IEEE TRANSACTIONS ON VLSI SYSTEMS, the IEEE DESIGN AND TEST OF COMPUTERS, etc. He has served as the General Chairs of ICCAD and ISPD, the Program Chairs of ASP-DAC, FPT, ICCAD, and ISPD, the Steering Committee Chair of ISPD, and the Executive/Steering Committees of ASP-DAC, DAC, ICCAD, and ISPD. He has served as the Chair of the EDA Consortium of the Ministry of Education, Taiwan, an Independent Board Director of Genesys Logic, and a Technical Consultant of Faraday, MediaTek, and RealTek. He co-founded the Maxeda Technology, Hsinchu, Taiwan, in 2015, which is a profit-earning EDA vendor providing the leading commercial macro placer MaxPlace.

Affiliation(s)

National Taiwan University

Taiwan

President (2020-2021)

IEEE CEDA

Secretary

Elena-Ioana Vatajelu

CNRS

TIMA Laboratory

France

8 (Africa, Europe, Middle East)

Vice-President for Activities

Tsung-Yi Ho

National Tsing Hua University

Taiwan

10 (Asia and Pacific)

Tsung-Yi Ho

10 (Asia and Pacific)

Biography

Tsung-Yi Ho (SM’10) received the Ph.D. degree in electrical engineering from National Taiwan University, Taipei, Taiwan, in 2005. He is a Professor with the Department of Computer Science, National Tsing Hua University, Hsinchu, Taiwan. He has presented ten tutorials and contributed 11 special sessions in ACM/IEEE conferences, all in design automation for microfluidic biochips. His research interests include design automation and test for microfluidic biochips and nanometer integrated circuits.

Dr. Ho is the recipient of the Invitational Fellowship of the Japan Society for the Promotion of Science, the Humboldt Research Fellowship by the Alexander von Humboldt Foundation, and the Hans Fischer Fellowship by the Institute of Advanced Study, Technical University of Munich. He was a recipient of the Best Paper Awards at the VLSI Test Symposium in 2013 and the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems in 2015. He served as a Distinguished Visitor of the IEEE Computer Society for 2013–2015, the Chair of the IEEE Computer Society Tainan Chapter for 2013–2015, and the Chair of the ACM SIGDA Taiwan Chapter for 2014–2015. He is currently an ACM Distinguished Speaker, a Distinguished Lecturer of the IEEE Circuits and Systems Society, and an Associate Editor for the ACM Journal on Emerging Technologies in Computing Systems, the ACM Transactions on Design Automation of Electronic Systems, the ACM Transactions on Embedded Computing Systems, the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, and the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, and the Technical Program Committees of major conferences, including the Design Automation Conference, the International Conference on Computer-Aided Design, the IEEE/ACM Design Automation and Test in Europe Conference, the Asia and South Pacific Design Automation Conference, the ACM/SIGDA International Symposium on Physical Design, and the International Conference on Computer Design.

Affiliation(s)

National Tsing Hua University

Taiwan

Vice-President for Awards

Georges Gielen

KU Leuven

Belgium

8 (Africa, Europe, Middle East)

Georges Gielen

8 (Africa, Europe, Middle East)

Biography

Georges G.E. Gielen received the MSc and Ph.D. degrees in Electrical Engineering from the Katholieke Universiteit Leuven (KU Leuven), Belgium, in 1986 and 1990, respectively. He currently is a Full Professor in the MICAS research division at the Department of Electrical Engineering (ESAT) at KU Leuven. From August 2013 until July 2017 he served as Vice-Rector for the Group of Sciences, Engineering, and Technology. He was visiting professor at UC Berkeley and Stanford University. Since 2020 he is Chair of the Department of Electrical Engineering (ESAT) at KU Leuven. His research interests are in the design of analog and mixed-signal integrated circuits, especially in analog and mixed-signal CAD tools and design automation, including modeling, simulation, optimization, and synthesis as well as testing. He is a frequently invited speaker/lecturer and coordinator/partner of several (industrial) research projects in this area, including an ERC Advanced Grant. He has (co-)authored 10 books and more than 700 publications in edited books, international journals, and conference proceedings. He is a 1997 Laureate of the Belgian Royal Academy of Sciences, Literature, and Arts in the discipline of Engineering. He is a Fellow of the IEEE since 2002 and received the IEEE CAS Mac Van Valkenburg award in 2015 and the IEEE CAS Charles Desoer award in 2020, as well as the EDAA Achievement Award in 2021. He is an elected member of the Academia Europaea.

Affiliation(s)

KU Leuven

Belgium

Vice-President for Conferences

Cristiana Bolchini

Politecnico di Milano

Italy

8 (Africa, Europe, Middle East)

Vice-President for Finance

Marina Zapater

University of Applied Sciences Western Switzerland (HES-SO)

Switzerland

8 (Africa, Europe, Middle East)

Vice-President for Initiatives

Ian O'Connor

École Centrale de Lyon

France

8 (Africa, Europe, Middle East)

Vice-President for Publications

Jörg Henkel

Karlsruhe Institute of Technology (KIT)

Germany

8 (Africa, Europe, Middle East)

Jörg Henkel

8 (Africa, Europe, Middle East)

Biography

Prof. Jörg Henkel is with Karlsruhe Institute of Technology (KIT), Germany, where he is directing the Chair for Embedded Systems CES. Before, he was a Senior Research Staff Member at NEC Laboratories in Princeton, NJ. He received his PhD from Braunschweig University with "Summa cum Laude".

Prof. Henkel has/is organizing various embedded systems and low power ACM/IEEE conferences/symposia as General Chair and Program Chair and was a Guest Editor on these topics in various journals like the IEEE Computer Magazine.

He was Program Chair of CODES'01, RSP'02, ISLPED’06, SIPS'08, CASES'09, Estimedia'11, VLSI Design'12, ICCAD’12, PATMOS’13, NOCS’14 and served as General Chair for CODES'02, ISLPED’09, Estimedia’12, ICCAD’13 and ESWeek'16. He is/has been a steering committee member of major conferences in the embedded systems field like at ICCAD, ESWeek, ISLPED, Codes+ISSS, CASES and is/has been an editorial board member of various journals like the IEEE TVLSI, IEEE TCAD, IEEE TMSCS, ACM TCPS, JOLPE, etc.

In recent years, Prof. Henkel has given more than ten keynotes at various international conferences primarily with focus on embedded systems dependability. He has given full/half-day tutorials at leading conferences like DAC, ICCAD, DATE, etc. Prof. Henkel received the 2008 DATE Best Paper Award, the 2009 IEEE/ACM William J. Mc Calla ICCAD Best Paper Award, the Codes+ISSS 2015, 2014, and 2011 Best Paper Awards, and the MaXentric Technologies AHS 2011 Best Paper Award as well as the DATE 2013 Best IP Award and the DAC 2014 Designer Track Best Poster Award. He is the Chairman of the IEEE Computer Society, Germany Section, and was the Editor-in-Chief of the ACM Transactions on Embedded Computing Systems (ACM TECS) for two consecutive terms.
He is an initiator and the coordinator of the German Research Foundation's (DFG) program on 'Dependable Embedded Systems' (SPP 1500). He is the site coordinator (Karlsruhe site) of the Three-University Collaborative Research Center on "Invasive Computing" (DFG TR89). He is the Editor-in-Chief of the IEEE Design&Test Magazine. He holds ten US patents and is a Fellow of the IEEE.

Affiliation(s)

Karlsruhe Institute of Technology (KIT)

Germany

Vice-President for Publicity

Agnieszka Dubaj

Intel Corp.

United States

6 (Western U.S.)

Vice-President for Standards

Aparna Dey

6 (Western U.S.)

Vice-President for Strategy

Enrico Macii

Politecnico di Torino

Italy

8 (Africa, Europe, Middle East)

Young Professionals Coordinator

Qi Zhu

Northwestern University

United States

4 (Central U.S.)

Qi Zhu

4 (Central U.S.)

Biography

Dr. Qi Zhu is a tenured Associate Professor in the Department of Electrical and Computer Engineering (ECE) at Northwestern University. He was an Assistant Professor and later Associate Professor in the ECE Department at University of California, Riverside from 2011 to 2017, and a Research Scientist at the Strategic CAD Labs in Intel from 2008 to 2011. Dr. Zhu received a Ph.D. in EECS from University of California, Berkeley in 2008, and a B.E. in CS from Tsinghua University in 2003. His research interests include model-based design, synthesis and verification of cyber-physical systems (CPS) and Internet of Things, CPS security, embedded and real-time systems, connected and autonomous vehicles, energy-efficient buildings and infrastructures, and system-on-chip design. He received best paper awards at Design Automation Conference (DAC) 2006, DAC 2007, International Conference on Cyber-Physical Systems (ICCPS) 2013, and ACM Transactions on Design Automation of Electronic Systems (TODAES) 2016. He received the NSF CAREER award in 2016, and the IEEE TCCPS (Technical Committee on Cyber-Physical Systems) Early-Career Award in 2017. Dr. Zhu is an Associate Editor for IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IET Cyber-Physical Systems: Theory & Applications, and IEEE TCCPS Newsletter. He served as an Associate Editor for IEEE TC-VLSI Newsletter and ACM SIGDA e-Newsletter, and as a Guest Editor for the Proceedings of the IEEE and ACM Transactions on Cyber-Physical Systems (TCPS). He is the Conference Chair of IEEE TCCPS. Dr. Zhu has served on the technical program committee and as organizer for a number of conferences in design automation, cyber-physical systems, embedded systems, and real-time systems, including DAC, ICCAD, DATE, ASP-DAC, ICCPS, CODES+ISSS, RTSS, RTAS, ICESS, GLVLSI, SAC, SIES, MEMOCODE, SAMOS, FDL, etc. He received the ACM SIGDA Service Award in 2015.

Affiliation(s)

Northwestern University

United States

Antennas & Propagation Society Representative

Quan Xue

City University of Hong Kong

Hong Kong SAR China

10 (Asia and Pacific)

Quan Xue

10 (Asia and Pacific)

Biography

Quan Xue received the B.S., M.S., and Ph.D. degrees in electronic engineering from the University of Electronic Science and Technology of China (UESTC), Chengdu, China, in 1988, 1991, and 1993, respectively. In 1993, he joined the UESTC, as a Lecturer. He became a Professor in 1997. From October 1997 to October 1998, he was a Research Associate and then a Research Fellow with the Chinese University of Hong Kong.

In 1999, he joined the City University of Hong Kong where he is currently a Chair Professor of Microwave Engineering. He also served the University as the Associate Vice President (Innovation Advancement and China Office) (June 2011-Jan 2015), and is now the Director of Information and Communication Technology Center (ICTC center), and the Deputy Director of the State Key Lab of Millimeter Waves (Hong Kong).

He has authored or co-authored over 300 internationally referred journal papers and over 160 international conference papers. He is co-inventor of 5 granted Chinese patents and 17 granted US patents, in addition to 26 filed patents. His research interests include microwave/millimeter-wave/THz passive components, active components, antenna, microwave monolithic integrated circuits (MMIC, and radio frequency integrated circuits (RFIC), etc. Professor Xue is a Fellow of IEEE. He served the IEEE as an AdCom member of MTT-S (2011-2013) and the Associate Editor of IEEE Transactions on Microwave Theory and Techniques (2010-2013), the Editor of International Journal of Antennas and Propagation (2010-2013), the Associate Editor of IEEE Transactions on Industrial Electronics (2010-2015). He is now an Associate Editor of IEEE Transactions on Antennas and Propagation (2016-present).

Affiliation(s)

City University of Hong Kong

Hong Kong SAR China

Circuits & Systems Society Representative

Ricardo Reis

Universidade Federal do Rio Grande do Sul

Brazil

9 (Latin America)

Computer Society Representative

Ramesh Nair

EDA Tools Engineering Manager

Intel Corporation

United States

6 (Western U.S.)

Ramesh Nair

6 (Western U.S.)

Biography

Ramesh Nair has over 10 years of experience in the semiconductor industry. Ramesh works as an EDA Tools Engineering Manager at Intel Corporation in Folsom, California. At Intel, he manages a team that develops tools, flows and methodology for next generation core CPU and SoC designs. Ramesh’s areas of technical interest include Electronic Design Automation, Static Timing Analysis and Low Power Circuit Design. He is a recipient of multiple Intel Organizational and Department awards and the 2014 Design Automation Conference (DAC) Young Research Fellowship. Ramesh currently serves on the Board of Governors of the IEEE Council on Electronic Design Automation (CEDA). He holds a master’s degree in Computer Engineering from University of Cincinnati.

Ramesh is an IEEE Senior Member with volunteering and leadership experience at the local and global levels. Ramesh is currently a member-at-Large of the IEEE Awards Board and a past member of the IEEE-USA Board of Directors and IEEE MGA Awards & Recognition Committee. He is also a member of the IEEE Awards Board Presentation & Publicity Committee (P&P). Ramesh is a recipient of the 2018 IEEE MGA Achievement Award, 2017 IEEE MGA Young Professionals Achievement Award and 2020 & 2017 IEEE Region 6 Director’s Recognition Award. He is an advocate and volunteer for local STEM outreach initiatives. He is also a professional member of the Eta Chapter of IEEE-HKN.

Affiliation(s)

EDA Tools Engineering Manager

Intel Corporation

United States

Electron Devices Society Representative

Position Vacant

Electronics Packaging Society Representative

José Schutt-Ainé

University of Illinois

United States

4 (Central U.S.)

José Schutt-Ainé

4 (Central U.S.)

Biography

José E. Schutt-Ainé (S’86–M’86–SM’98–F’07) received the B.S. degree in electrical engineering from the Massachusetts Institute of Technology, Cambridge, MA, USA, in 1981, and the M.S. and Ph.D. degrees from the University of Illinois at Urbana–Champaign (UIUC), Urbana, IL, USA, in 1984 and 1988, respectively.

From 1981 to 1983, he was with the Hewlett Packard Technology Center, Santa Rosa, CA, USA, as an Application Engineer, where he was involved in research on microwave transistors and high-frequency circuits. In 1988, he joined the Electrical and Computer Engineering Department, UIUC, as a member of Electromagnetics and Coordinated Science Laboratories, where he is currently involved in research on signal integrity for high-speed digital and high-frequency applications. He is a consultant for several corporations. His current research interests include the study of signal integrity and the generation of computer-aided design tools for high-speed digital systems.

Dr. Schutt-Ainé was a recipient of several research awards, including the 1991 National Science Foundation (NSF) MRI Award, the NASA Faculty Award for Research, in 1992, the NSF MCAA Award, in 1996, and the UIUC-NCSA Faculty Fellow Award, in 2000. He has also received several publication awards, including the IEEE Electrical Design of Advanced Packaging and Systems Symposium-2013 Best Paper Award and the IEEE Electrical Performance of Electronic Packaging-2014 Best Paper Award. He is currently serving as the Co-Editor-in-Chief of the IEEE Transactions on Components, Packaging and Manufacturing Technology.

Affiliation(s)

University of Illinois

United States

Microwave Theory & Techniques Society Representative

José E. Rayas-Sánchez

ITESO – the Jesuit University of Guadalajara

Mexico

9 (Latin America)

José E. Rayas-Sánchez

9 (Latin America)

Biography

José Ernesto Rayas-Sánchez received the B.Sc. degree in electronics engineering from ITESO–The Jesuit University of Guadalajara, Tlaquepaque, Mexico, the M.Sc. degree in electrical engineering from Monterrey Tec (ITESM), Monterrey, Mexico, and the Ph.D. degree in electrical engineering from McMaster University, Ontario, ON, Canada.

He is currently a Profesor Numerario (Hons.) with ITESO–The Jesuit University of Guadalajara, where he is the Chair of the Doctoral Program in Engineering Sciences, and leads the Research Group on Computer-Aided Engineering of Circuits and Systems (CAECAS). His current research interests include computer-aided and knowledge-based modeling, design and optimization of high-frequency electronic circuits and devices (including RF, microwave, and wireless circuits).

Dr. Rayas-Sánchez is a member of the Technical Program Reviewers Committee of the IEEE MTT-S International Microwave Symposium (IMS). He is the Chair of the Technical Committee on Computer-Aided Design (MTT-1) of the IEEE Microwave Theory and Techniques Society (MTT-S). He serves as a Reviewer for the following publications: the IEEE Transactions on Microwave Theory and Techniques, IEEE Microwave and Wireless Components Letters, IEEE Antennas and Wireless Propagation Letters, the IET Microwaves, Antennas and Propagation Journal, the International Journal on Numerical Modelling (Wiley), and the International Journal of RF and Microwave Computer-Aided Engineering (Wiley). Since 2013, he has been an IEEE MTT-S Regional Coordinator for Latin America. He was the General Chair of the First IEEE MTT-S International Microwave Workshop Series in Region 9 (IMWS2009-R9) on Signal Integrity and High-Speed Interconnects (Guadalajara, Mexico, 2009), as well as the General Chair of the First IEEE MTT-S Latin America Microwave Conference (LAMC-2016, Puerto Vallarta, Mexico, 2016).

Affiliation(s)

ITESO – the Jesuit University of Guadalajara

Mexico

Solid-State Circuits Society Representative

Vivek Tiwari

Intel Corp.

United States

6 (Western U.S.)

Design&Test Editor-in-Chief

Partha Pratim Pande

Washington State University

United States

6 (Western U.S.)

ESL Editor-in-Chief

Preeti Ranjan Panda

Indian Institute of Technology, Delhi

India

10 (Asia and Pacific)

Preeti Ranjan Panda

10 (Asia and Pacific)

Biography

Preeti Ranjan Panda received his B. Tech. degree in Computer Science and Engineering from the Indian Institute of Technology Madras and his M. S. and Ph.D. degrees in Information and Computer Science from the University of California at Irvine. He is currently a Professor in the Department of Computer Science and Engineering at the Indian Institute of Technology Delhi. He has previously worked at Texas Instruments, Bangalore, and the Advanced Technology Group at Synopsys Inc., Mountain View, and has been a visiting scholar at Stanford University.

His research interests are Embedded Systems Design, CAD/VLSI, Post-silicon Debug/Validation, System Specification and Synthesis, Memory Architectures and Optimisations, Hardware/Software Codesign, and Low Power Design. He is the author of two books: Memory issues in Embedded Systems-on-chip: Optimizations and Exploration (Kluwer Academic Publishers) and Power-efficient System Design (Springer). He is a recipient of an IBM Faculty Award , the IESA Techno Mentor Award, and a Department of Science and Technology Young Scientist Award. Research works authored by Prof. Panda and his students have received several honours, including Best Paper nominations at CODES+ISSS, DATE, ASPDAC, and VLSI Design Conference, and Most downloaded paper of ACM TODAES journal.

Prof. Panda currently serves as the Editor-in-Chief of IEEE Embedded Systems Letters (ESL). He has served on the editorial boards of IEEE Transactions on Computer Aided Design of Integrated Circuits and Systems (TCAD) , ACM Transactions on Design Automation of Electronic Systems (TODAES) , IEEE Embedded Systems Letters (ESL), IEEE Transactions on Multi-Scale Computing Systems (TMSCS) and International Journal of Parallel Programming (IJPP), General co-Chair of VLSI Design, and as Technical Program co-Chair of the International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS) and International Conference on VLSI Design and Embedded Systems (VLSI Design). He has also served on the technical program committees and chaired sessions at several conferences in the areas of Embedded Systems and Design Automation, including DAC, ICCAD, DATE, CODES+ISSS, IPDPS, ASPDAC, and EMSOFT.

Affiliation(s)

Indian Institute of Technology, Delhi

India

TCAD Editor-in-Chief

David Atienza

Ecole Polytechnique Fédérale de Lausanne (EPFL)

Switzerland

8 (Africa, Europe, Middle East)

David Atienza

8 (Africa, Europe, Middle East)

Biography

David Atienza Alonso received his MSc and PhD degrees in Computer Science and Engineering from Complutense Univ. of Madrid (UCM), Spain, and IMEC, Belgium, in 2001 and 2005. Currently, he is an associate professor of electrical and computer engineering, and head of the Embedded Systems Laboratory (ESL) at the Swiss Federal Institute of Technology Lausanne (EPFL), Switzerland. His research interests include system-level design methodologies for high-performance multi-processor system-on-chip (MPSoC) and low-power Internet-of-Things (IoT) systems, including new 2-D/3-D thermal-aware design for MPSoCs and many-core servers, ultra-low power system architectures for wireless body sensor nodes and edge computing, HW/SW reconfigurable systems, dynamic memory optimizations, and network-on-chip design. He is a co-author of more than 250 publications in peer-reviewed international journals and conferences, several book chapters, and eight U.S. patents in these fields. He has earned several best paper awards and he is (or has been) an Associate Editor of IEEE TC, IEEE D&T, IEEE T-TCAD, IEEE T-SUSC and Elsevier Integration. He was the Technical Programme Chair of IEEE/ACM DATE 2015 and General Programme Chair of IEEE/ACM DATE 2017. Dr. Atienza received the DAC Under-40 Innovators Award in 2018, the IEEE TCCPS Mid-Career Award in 2018, an ERC Consolidator Grant in 2016, the IEEE CEDA Early Career Award in 2013, the ACM SIGDA Outstanding New Faculty Award in 2012, and a Faculty Award from Sun Labs at Oracle in 2011. He is an IEEE Fellow and an ACM Distinguished Member.

Affiliation(s)

Ecole Polytechnique Fédérale de Lausanne (EPFL)

Switzerland

Design Automation TC Chair(s)

Jinwook Jung

Research Staff Member

IBM Research

United States

1 (Northeastern U.S.)

Andrew Kahng

University of California, San Diego

United States

6 (Western U.S.)

Hardware Security and Trust TC Chair

Yier Jin

University of Florida

United States

3 (Southeastern U.S.)

Yier Jin

3 (Southeastern U.S.)

Biography

Yier Jin is the Endowed IoT Term Professor in the Warren B. Nelms Institute for the Connected World and also an Associate Professor in the Department of Electrical and Computer Engineering (ECE) in the University of Florida (UF). Prior to joining UF, he was an assistant professor in the ECE Department at the University of Central Florida (UCF). He received his PhD degree in Electrical Engineering in 2012 from Yale University after he got the B.S. and M.S. degrees in Electrical Engineering from Zhejiang University, China, in 2005 and 2007, respectively. His research focuses on the areas of embedded systems design and security, trusted hardware intellectual property (IP) cores and hardware-software co-design for modern computing systems. He is currently focusing on the design and security analysis on Internet of Things (IoT) and wearable devices with particular emphasis on information integrity and privacy protection in the IoT era. Dr. Jin received Young Investigator Grant from Southeastern Center for Electrical Engineering Education (SCEEE) in 2015, early CAREER award from Department of Energy (DoE) in 2016, Outstanding New Faculty Award (ONFA) from ACM’s Special Interest Group on Design Automation (SIGDA) in 2017, and Young Investigator Award (YIP) from Office of Naval Research (ONR) in 2019. He also received the Best Paper Award of the 52nd Design Automation Conference in 2015, the 21st Asia and South Pacific Design Automation Conference (DAC) in 2016, the 10thIEEE Symposium on Hardware-Oriented Security and Trust (HOST) in 2017, the 2018 ACM Transactions on Design Automation of Electronic Systems (TODAES), the 28thedition of the ACM Great Lakes Symposium on VLSI (GLSVLSI) in 2018, and the Design, Automation and Test in Europe Conference and Exhibition (DATE) in 2019. He is the IEEE Council on Electronic Design Automation (CEDA) Distinguished Lecturer.

Affiliation(s)

University of Florida

United States

Gang Qu

University of Maryland

United States

2 (Eastern U.S.)

System Validation & Debug TC Chair

Chinna Prudvi

Intel Corp.

United States

6 (Western U.S.)

Test Technology TC Chair

Peilin Song

IBM Thomas J. Watson Research Center

United States

1 (Northeastern U.S.)

TC on Cyber-Physical Systems Chair

Shiyan Hu

University of Southampton

United Kingdom

8 (Africa, Europe, Middle East)

Shiyan Hu

8 (Africa, Europe, Middle East)

Biography

Professor Shiyan Hu received his Ph.D. in Computer Engineering from Texas A&M University in 2008. Currently, he is a Professor (Chair in Cyber-Physical System Security) at University of Southampton. His research interests include Cyber-Physical Systems and Cyber-Physical System Security, where he has published more than 100 refereed papers, including 50+ in premier IEEE Transactions. He is an ACM Distinguished Speaker, an IEEE Systems Council Distinguished Lecturer, a recipient of the 2017 IEEE Computer Society TCSC Middle Career Researcher Award, and a recipient of the 2014 U.S. National Science Foundation (NSF) CAREER Award. His publications have received distinctions such as the 2018 IEEE Systems Journal Best Paper Award, the 2017 Keynote Paper in IEEE Transactions on Computer-Aided Design, the Front Cover Paper in IEEE Transactions on Nanobioscience in March 2014, Thomson Reuters ESI Highly Cited Paper 2017-2019, etc. His research has been featured in various public media such as National Science Foundation News Headlines, Science Daily, CBS, IEEE Spectrum, and Communications of ACM. He is the Chair for IEEE Technical Committee on Cyber-Physical Systems. He is the Editor-In-Chief of IET Cyber-Physical Systems: Theory & Applications. He is an Associate Editor for IEEE Transactions on Computer-Aided Design, IEEE Transactions on Industrial Informatics, IEEE Transactions on Circuits and Systems, ACM Transactions on Design Automation for Electronic Systems, and ACM Transactions on Cyber-Physical Systems. He is also a Guest Editor for eight IEEE/ACM journals such as Proceedings of the IEEE and IEEE Transactions on Computers. He has held chair positions in many conferences.

Affiliation(s)

University of Southampton

United Kingdom

ASP-DAC Representative

Kazutoshi Wakabayashi

NEC Corporation

Japan

10 (Asia and Pacific)

DAC Representative

Gi-Joon Nam

IBM Research

United States

1 (Northeastern U.S.)

L. Miguel Silveira

INESC-ID, IST, Universidade de Lisboa

Portugal

8 (Africa, Europe, Middle East)

DATE Representative

Donatella Sciuto

Politecnico di Milano

Italy

8 (Africa, Europe, Middle East)

ICCAD Representative

Tsung-Yi Ho

National Tsing Hua University

Taiwan

10 (Asia and Pacific)

Tsung-Yi Ho

10 (Asia and Pacific)

Biography

Affiliation(s)

National Tsing Hua University

Taiwan

Fellow Evaluation Committee Chair

Deming Chen

University of Illinois at Urbana-Champaign

United States

4 (Central U.S.)

Deming Chen

4 (Central U.S.)

Biography

Dr. Deming Chen obtained his BS in computer science from University of Pittsburgh, Pennsylvania in 1995, and his MS and PhD in computer science from University of California at Los Angeles in 2001 and 2005 respectively. He worked as a software engineer between 1995-1999 and 2001-2002. He joined the ECE department of University of Illinois at Urbana-Champaign in 2005 and has been a full professor in the same department since 2015. He is a research professor in the Coordinated Science Laboratory and an affiliate professor in the CS department. His current research interests include system-level and high-level synthesis, machine learning algorithms and acceleration, GPU and reconfigurable computing, computational genomics, and hardware security. He has given more than 110 invited talks sharing these research results worldwide.

Dr. Chen is a technical committee member for a series of top conferences and symposia on EDA, FPGA, low-power design, and VLSI systems design. He has also served as General or TPC Chair, Track Chair, Session Chair, Panelist, Panel Organizer, or Moderator for these conferences. He is or has been an associated editor for IEEE TCAD, ACM TODAES, IEEE TVLSI, ACM TRETS, IEEE TCAS-I and TCAS-II, IET Cyber-Physical Systems, JCSC, and JOLPE. He obtained the Achievement Award for Excellent Teamwork from Aplus Design Technologies in 2001, the Arnold O. Beckman Research Award from UIUC in 2007, the NSF CAREER Award in 2008, and nine Best Paper Awards. He is included in the List of Teachers Ranked as Excellent in 2008 and 2017. He received the ACM SIGDA Outstanding New Faculty Award in 2010, and IBM Faculty Award in 2014 and 2015. In 2017 and 2019 respectively, he led a team to win the first place of DAC International System Design Contest. He has given a series of Keynote or Plenary speeches at various conferences. He is the Donald Biggar Willett Faculty Scholar and Abel Bliss Professor of College of Engineering, an IEEE Fellow, an ACM Distinguished Speaker, and the Editor-in-Chief of ACM Transactions on Reconfigurable Technology and Systems (TRETS).

Dr. Chen was involved in several startup companies. He implemented his published algorithm on CPLD technology mapping when he was a software engineer in Aplus Design Technologies, Inc. in 2001, and the software was exclusively licensed by Altera and distributed to many customers of Altera worldwide. He is one of the inventors of the xPilot High Level Synthesis package developed at UCLA, which was licensed to AutoESL Design Technologies, Inc. Aplus was acquired by Magma in 2003, and AutoESL was acquired by Xilinx in 2011. He has also served as a consultant for several leading semiconductor companies.

In 2016, he co-founded a startup, Inspirit IoT, Inc., for design, acceleration and deployment of machine learning solutions targeting the IoT industry. He is currently the Chairman of the Board and the Interim CTO of the company. Inspirit IoT recently received an NSF SBIR (Small Business Innovation Research) Award from the US government.

Affiliation(s)

University of Illinois at Urbana-Champaign

United States

Diversity & Inclusion Chair*

Shao-Yun Fang

National Taiwan University of Science and Technology

Taiwan

10 (Asia and Pacific)

IEEE WIE Representative*

Shao-Yun Fang

National Taiwan University of Science and Technology

Taiwan

10 (Asia and Pacific)

IEEE Division I Director (ex-officio)

Alfred E. Dunlop

IEEE Vice President, Technical Activities (ex-officio)

Kazuhiro Kosuge

Tohoku University

Japan

10 (Asia and Pacific)

Council Operations Manager*

Amanda Osborn

Operations Manager

Conference Catalysts

United States

4 (Central U.S.)