As it stands today, the IEEE Grade of Fellow is conferred by the Board of Directors upon a person with an extraordinary record of accomplishments in any of the IEEE fields of interest. The total number selected in any one year does not exceed one-tenth of one percent of the total voting Institute membership. Each new Fellow receives a beautifully matted and framed certificate with the name of the Fellow and a brief citation describing the accomplishment, a congratulatory letter from the incoming IEEE president and a gold sterling silver Fellow lapel pin with an antique finish. Please note: The list below includes "IEEE Fellows" elevated by the Council on Electronic Design Automation. The Council acknowledges that there are additional members of our community that have been elevated by other organizational units of the IEEE. Nomination Details: Fellow nominations are due February 7 each year. Information on the IEEE Fellows Program to help nominators prepare their submissions. Recipients 2024 Photo: Sri Parameswaran for contributions to embedded computer circuits and systems Acceptance Speech × Photo: Sudeep Pasricha for contributions to design and optimization of chip-scale communication architectures for manycore computing Acceptance Speech × Photo: Qinru Qiu for contributions to modeling and optimization of energy efficient computing systems Acceptance Speech × Photo: Haoxing Ren for contributions to physical synthesis of integrated circuits Acceptance Speech × Photo: Jinjun Xiong for contributions to process variation modeling, circuit yield optimization, and their applications in industry Acceptance Speech × Photo: Lei He for contributions to integrated circuits and smart energy systems Acceptance Speech × 2023 Photo: Sung Kyu Lim for contributions to electronic design automation and the tradeoff for 3-dimensional integrated circuits Acceptance Speech × Photo: Sherief Reda for contributions to energy-efficient and approximate computing Acceptance Speech × Photo: Fung Yu Young for contributions to electronic design automation in VLSI physical design Acceptance Speech × Photo: Zhiru Zhang for contributions to field-programmable gate array high-level synthesis and accelerator design Acceptance Speech × Pagination 1 2 3 4 … ›› Next page Last » Last page
for contributions to design and optimization of chip-scale communication architectures for manycore computing
for contributions to process variation modeling, circuit yield optimization, and their applications in industry
for contributions to electronic design automation and the tradeoff for 3-dimensional integrated circuits