IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award

To recognize the best paper published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Historical Background:

The IEEE Transactions on Computer-Aided Design Donald O. Pederson Best Paper Award is sponsored by the IEEE Council on EDA and recognizes the best paper published in the Transactions on Computer-Aided Design of Integrated Circuits and Systems publication.

The award is based on the overall quality, the originality, the level of contribution, the subject matter and the timeliness of the research. Anyone who is an author of a paper published in the Transactions on Computer-Aided Design of Integrated Circuits and Systems during the two calendar years preceding the award is eligible for nomination.

Prize:

$500 for each author (maximum of $2,000 per award) and certificate

Funding:

Funded by the IEEE Council on Electronic Design Automation.

Presentation:

The award will be presented at the ICCAD conference.

Basis for Judging:

General quality, originality, contributions, subject matter, and timeliness.

Eligibility:

Authors of papers published in the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems during the two calendar years preceding the award. Self Nominations are permitted. Each nominator may only nominate one paper only.

Nomination Details:

~~Nomination deadline is 28 February of the award year.~~ Deadline Extended to 15 March 2022.

Nomination Form:

Nominate for this Award

Recipients

2021

"Hardware/Software Co-Exploration of Neural Architectures "

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 39, Issue 12, Dec. 2020

Weiwen Jiang, Lei Yang, Edwin Hsing-Mean Sha, Qingfeng Zhuge, Shouzhen Gu, Sakyasingha Dasgupta, Yiyu Shi

, and Jingtong Hu

"DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 40, Issue 4, April 2021

Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, and David Z. Pan

2020

"An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 7, pp. 1226-1236, July 2019

Alwin Zulehner, Alexandru Paler, and Robert Wille

Robert Wille

8 (Africa, Europe, Middle East)

Biography

Robert Wille is a Full and Distinguished Professor at the Technical University of Munich, Germany, and Chief Scientific Officer at the Software Competence Center Hagenberg GmbH, Austria.

From 2002 to 2006, Robert Wille studied Computer Science (Diploma) at the University of Bremen. After successfully completing his doctorate in 2009 (summa cum laude), he worked as a postdoc at the University of Bremen and, since 2013, as a Senior Researcher in the Cyber-Physical Systems department of the German Research Center for Artificial Intelligence (DFKI). Besides that, he served as a lecturer at the University of Applied Science Bremen from 2010 to 2012 and was a guest professor at the University of Potsdam in 2012 as well as the Technical University of Dresden in 2013/2014. From 2015 to 2022, he was Full Professor at the Johannes Kepler University Linz and head of the Institute for Integrated Circuits (at the age of 32 and as one of the youngest full professors in the field). In 2019, he founded the LIT Secure and Correct Systems Lab at JKU, and, in 2020, he additionally became Chief Scientific Officer at the Software Competence Center Hagenberg GmbH. Since 2022, he works in Munich---appointed through a "Leuchtturm"-procedure (i.e., direct appointment) and, additionally, through the "Distinguished Professorship"-program.

Robert Wille's expertise covers a broad spectrum of topics with a particular focus on the development of automatic methods for the design, simulation, verification, and test of complex systems in hard- and software. He considers conventional technologies (from formal specifications to the realization) as well as future technologies (including quantum computing, microfluidic biochips, field-coupled nanotechnologies, optical circuits, memristors, reversible circuits, and adiabatic circuits). Besides that, he frequently applies his expertise to complementary fields in cooperation with groups from other areas of Computer Science (e.g., Machine Learning, Software Development, Theoretical Computer Science, Database Systems, Operation Systems, and more) as well as Mechatronics and Electrical Engineering. Furthermore, his work on future technologies frequently exposes him to topics from physics, biology, chemistry, and optics. Also, projects with legal sciences are within his portfolio.

Since 2007, Robert Wille published more than 400 journal and conference papers in this area and was repeatedly awarded (e.g., with Best Paper Awards, e.g., at TCAD and ICCAD, an ERC Consolidator Grant, a Distinguished and a Lighthouse Professor appointment, a Google Research Award, and more). Besides that, he served as Associate Editor and Guest Editor for various renowned journals such as the IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), the ACM Journal on Emerging Technologies in Computing Systems (JETC), or Springer’s Lecture Notes in Computer Science (LNCS). Additionally, he was General Chair and PC Chair for several conferences is Executive Committee Member for DATE and ICCAD, served in numerous Program Committees, and organized several tutorials, seminars, workshops, and special sessions.

For more details, please see https://www.cda.cit.tum.de/team/wille/.

Affiliation(s)

Technical University of Munich

Germany

2019

"YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 37, no. 1, pp. 48-60, Jan. 2018

Renzo Andri, Lukas Cavigelli, Davide Rossi, and Luca Benini

Luca Benini

8 (Africa, Europe, Middle East)

Biography

Prof. Luca Benini is the chair of digital Circuits and Systems at D-ITET ETHZ.
He received a Ph.D. degree in electrical engineering from Stanford University in 1997.

He has served as Chief Architect for the Platform2012/STHORM project in STMicroelectronics, Grenoble in the period 2009-2013. He is also a professor at the University of Bologna and has held visiting and consulting researcher positions at EPFL, IMEC, Hewlett-Packard Laboratories, Stanford University.

Dr. Benini's research interests are in the design of energy-efficient digital systems with special emphasis on ultra-low-power System-on-Chip and green HPC systems. He is also active in the area of smart sensors and sensor networks for consumer, biomedical and Internet-of-Things applications. In these areas, he has coordinated tens of funded projects, including an ERC Advanced Grant on Multiscale thermal management of Computing Systems.

He has been general chair of the Design Automation and Test in Europe Conference, of the Network on Chip Symposium and of the International Symposium on Low Power Electronics and Design. He is an Associate Editor of the IEEE Transactions on Computer-Aided Design of Circuits and Systems and the ACM Transactions on Embedded Computing Systems.

He has published more than 700 papers in peer-reviewed international journals and conferences, four books and several book chapters. He is a Fellow of the IEEE and the ACM and a member of the Academia Europaea. He is the recipient of the 2016 IEEE CAS Mac Van Valkenburg Award.

Affiliation(s)

Università di Bologna

Italy

Swiss Federal Institute of Technology, Zurich

Switzerland

2019

"Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 38, Issue 11, pp. 2072 - 2085, November 2019

Chen Zhang, Guangyu Sun, Zhenman Fang, Peipei Zhou, Peichen Pan, and Jason Cong

Jason Cong

6 (Western U.S.)

Website

Biography

JASON CONG received his B.S. degree in computer science from Peking University in 1985, his M.S. and Ph. D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1987 and 1990, respectively. Currently, he is a Chancellor’s Professor at the Computer Science Department of University of California, Los Angeles, the director of Center for Domain-Specific Computing (CDSC), co-director of UCLA/Peking University Joint Research Institute in Science and Engineering, and co-director of the VLSI CAD Laboratory. He served as the chair the UCLA Computer Science Department from 2005 to 2008. Dr. Cong is also a distinguished visiting professor at Peking University and the director of PKU Center for Energy-Efficient Computing and Applications (CECA). Dr. Cong’s research interests include synthesis of VLSI circuits and systems, programmable systems, novel computer architectures, nano-systems, and highly scalable algorithms. He has over 350 publications in these areas, including 7 best paper awards and the 2011 ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation. He was elected to an IEEE Fellow in 2000 and ACM Fellow in 2008. He is the recipient of the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award “For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation.”

Dr. Cong has graduated 30 PhD students. A number of them are now faculty members in major research universities, including Cornell, Georgia Tech., Peking University, Purdue, SUNY Binghamton, UCLA, UIUC, and UT Austin. Four of them were co-founders, together with Dr. Cong, of two startups originated from UCLA – Aplus Design Technologies (acquired by Magma in 2003, now part of Synopsys) and AutoESL Design Technologies (acquired by Xilinx in 2011). Others are in key R&D or management positions in various companies related to the information technologies, such as Bloomberg, Broadcom, Cadence, Google, IBM, Intel, Micron, Synopsys, and Xilinx.

Affiliation(s)

University of California, Los Angeles

United States

2018

"Majority-Inverter Graph: A New Paradigm for Logic Optimization"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 35, Issue 5, pp. 806 - 819, May 2016

Luca G. Amaru, Pierre-Emmanuel Gaillardon, and Giovanni De Micheli

Giovanni De Micheli

8 (Africa, Europe, Middle East)

Website

Biography

Giovanni De Micheli is Professor and Director of the Institute of Electrical Engineering and of the Integrated Systems Centre at EPF Lausanne, Switzerland. He is program leader of the Nano-Tera.ch program. Previously, he was Professor of Electrical Engineering at Stanford University.He holds a Nuclear Engineer degree (Politecnico di Milano, 1979), a M.S. and a Ph.D. degree in Electrical Engineering and Computer Science (University of California at Berkeley, 1980 and 1983).

Prof. De Micheli is a Fellow of ACM and IEEE and a member of the Academia Europaea. His research interests include several aspects of design technologies for integrated circuits and systems, such as synthesis for emerging technologies, networks on chips and 3D integration. He is also interested in heterogeneous platform design including electrical components and biosensors, as well as in data processing of biomedical information. He is author of: Synthesis and Optimization of Digital Circuits, McGraw-Hill, 1994, co-author and/or co-editor of eight other books and of over 750 technical articles. His citation h-index is 92 according to Google Scholar. He is member of the Scientific Advisory Board of IMEC (Leuven, B), CfAED (Dresden, D) and STMicroelectronics.

Prof. De Micheli is the recipient of the 2016 IEEE/CS Harry Goode award for seminal contributions to design and design tools of Networks on Chips, the 2016 EDAA Lifetime Achievement Award, the 2012 IEEE/CAS Mac Van Valkenburg award for contributions to theory, practice and experimentation in design methods and tools and the 2003 IEEE Emanuel Piore Award for contributions to computer-aided synthesis of digital systems. He received also the Golden Jubilee Medal for outstanding contributions to the IEEE CAS Society in 2000, the D. Pederson Award for the best paper on the IEEE Transactions on CAD/ICAS in 1987, and several Best Paper Awards, including DAC (1983 and 1993), DATE (2005), Nanoarch (2010 and 2012) and Mobihealth(2016).

He has been serving IEEE in several capacities, namely: Division 1 Director (2008-9), co-founder and President Elect of the IEEE Council on EDA (2005-7), President of the IEEE CAS Society (2003), Editor in Chief of the IEEE Transactions on CAD/ICAS (1997-2001). He has been Chair of several conferences, including Memocode (2014) DATE (2010), pHealth (2006), VLSI SOC (2006), DAC (2000) and ICCD (1989).

Affiliation(s)

EPFL

Switzerland

2017

"Mining Requirements from Closed-Loop Control Models"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 34, Issue 11, pp. 1704 – 1717, November 2015

Xiaoqing Jin, Alexandre Donzé, Jyotirmoy V. Deshmukh, and Sanjit A. Seshia

2016

"Fast Statistical Analysis of Rare Circuit Failure Events via Scaled-Sigma Sampling for High-Dimensional Variation Space"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 34, Issue 7, pp. 1096 - 1109, July 2015

Shupeng Sun, Xin Li

Xin Li

3 (Southeastern U.S.)

Biography

Prof. Xin Li received the Ph.D. degree in Electrical and Computer Engineering from Carnegie Mellon University, Pittsburgh, Pennsylvania, in 2005, and the M.S. and B.S. degrees in Electronics Engineering from Fudan University, Shanghai, China, in 2001 and 1998, respectively.

In 2005, he co-founded Xigmix Inc. to commercialize his PhD research, and served as the Chief Technical Officer until the company was acquired by Extreme DA in 2007. In 2011, Extreme DA was further acquired by Synopsis (Nasdaq: SNPS). From 2009 to 2012, he was the Assistant Director for FCRP Focus Research Center for Circuit & System Solutions (C2S2), a national consortium of 13 research universities (CMU, MIT, Stanford, Berkeley, UIUC, UMich, Columbia, UCLA, among others) chartered by the U.S. semiconductor industry and U.S. Department of Defense to work on next-generation integrated circuit design challenges. From 2014 to 2015, he was the Assistant Director for the Center for Silicon System Implementation (CSSI), a CMU research center with 20 faculty members working on integrated circuits and systems. His research interests include integrated circuit, signal processing and data analytics.

He was an Associate Editor of IEEE Trans. on Biomedical Engineering (TBME), IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems (TCAD), ACM Trans. on Design Automation of Electronic Systems (TODAES), IEEE Design & Test (D&T), and Journal of Low Power Electronics (JOLPE). He was the Guest Editor for IEEE TCAD, IEEE TNANO, IEEE TBD, IEEE D&T, IEEE JETCAS, ACM TCPS, ACM JETC and VLSI Integration. He served on the Executive Committee of ACM Special Interest Group on Design Automation (SIGDA), IEEE Systems, Man, and Cybernetics Society Technical Committee on Cybernetics for Cyber-Physical Systems (TCCCPS), and IEEE Computer Society Technical Committee on VLSI (TCVLSI). He was the General Chair of ISVLSI, iNIS and FAC, and the Technical Program Chair of CAD/Graphics. He also served on the ACM/SIGDA Outstanding PhD Dissertation Award Selection Committee, the IEEE TTTC E. J. McCluskey Best Doctoral Thesis Selection Committee, the IEEE Outstanding Young Author Award Selection Committee, the Executive Committee of ISVLSI, GLSVLSI and iNIS, and the Technical Program Committee of DAC, ICCAD, ITC, ISVLSI, FAC, CAD/Graphics, ASICON and VLSI. He received the NSF Faculty Early Career Development Award (CAREER) in 2012, two IEEE Donald O. Pederson Best Paper Awards in 2013 and 2016, the Best Paper Award from Design Automation Conference (DAC) in 2010, two IEEE/ACM William J. McCalla ICCAD Best Paper Awards in 2004 and 2011, and the Best Paper Award from International Symposium on Integrated Circuits (ISIC) in 2014. In addition to these awards, he also received six Best Paper Nominations from Design Automation Conference (DAC), International Conference on Computer-Aided Design (ICCAD) and Custom Integrated Circuits Conference (CICC).

Affiliation(s)

Duke University

United States

, Hongzhou Liu

, Kangsheng Luo, and Ben Gu

2015

"Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 33, Issue 10, pp. 1463 - 1475, October 2014

Kai Hu, Feiqiao Yu, Tsung-Yi Ho

, and Krishnendu Chakrabarty

2014

"Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos"

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol. 32, Issue 10, pp. 1533 - 1545, September 2013

Zheng Zhang

, Tarek A. El-Moselhy, Ibrahim M. Elfadel, and Luca Daniel

Recipients

2021

"Hardware/Software Co-Exploration of Neural Architectures "

"DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement"

2020

"An Efficient Methodology for Mapping Quantum Circuits to the IBM QX Architectures"

2019

"YodaNN: An Architecture for Ultralow Power Binary-Weight CNN Acceleration"

2019

"Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks"

2018

"Majority-Inverter Graph: A New Paradigm for Logic Optimization"

2017

"Mining Requirements from Closed-Loop Control Models"

2016

"Fast Statistical Analysis of Rare Circuit Failure Events via Scaled-Sigma Sampling for High-Dimensional Variation Space"

2015

"Testing of Flow-Based Microfluidic Biochips: Fault Modeling, Test Generation, and Experimental Demonstration"

2014

"Stochastic Testing Method for Transistor-Level Uncertainty Quantification Based on Generalized Polynomial Chaos"

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