To honor a person or persons for an outstanding technical contribution within the scope of electronic design automation, as evidenced by a paper published at least ten years before the presentation of the award. Historical Background: A. Richard Newton, one of the foremost pioneers and leaders of the EDA field, passed away on 2 January 2007, of pancreatic cancer at the age of 55. A. Richard Newton was professor and dean of the College of Engineering at the University of California, Berkeley. Newton was educated at the University of Melbourne and received his bachelor’s degree in 1973 and his master’s degree in 1975. In the early 1970’s he began to work on SPICE, a simulation program initially developed by Larry Nagel and Donald Pederson to analyze and design complex electronic circuitry with speed and accuracy. In 1978, Newton earned his Ph.D. in electrical engineering and computer sciences from UC Berkeley. For his research and entrepreneurial contributions to the electronic design automation industry, he was awarded the 2003 Phil Kaufman Award, the highest recognition for contributions to the EDA field. In 2004, he was named a member of the National Academy of Engineering, and in 2006, of the American Academy of Arts and Sciences. He was a member of the Association for Computing Machinery and a fellow of the Institute of Electrical and Electronics Engineers. Prize: $1,500 and Plaque for each author. The honoraria will be shared by all authors. For groups of more than five awardees, there will be a minimum of $300 honorarium per contributor. Funding: Funded by the IEEE Council on Electronic Design Automation and ACM Special Interest Group on Design Automation. Presentation: Presented annually at the Design Automation Conference (DAC). Basis for Judging: The impact of the paper which has made an outstanding technical contribution in the scope of electronic design automation through a paper published at least ten years before the award is presented. The award shall be based on the impact of the paper in the field of electronic design automation published ten years or more before the year the award is presented. Eligibility: Open to authors of a paper in the field of electronic design automation published ten years or more before the award is presented. The paper must have passed through a peer-review process before publication, be an archived conference or journal publication available from or published by either ACM or IEEE, and be a seminal paper where an original idea was first described. Follow-up papers and extended descriptions of the work may be cited in the nomination, but the award is given for the initial original contribution. Nomination Details: The deadline for submitting nominations for the award year is 28 February of that same year. Nomination Form: Nominate for this Award Recipients 2023 "An Automata-Theoretic Approach to Automatic Program Verification" Published in the proceedings of the 1st Symposium on Logic in Computer Science, 1986 Moshe Y. Vardi, and Pierre Wolper Acceptance Speech × 2022 "Efficient Steady-State Analysis based on Matrix-Free Krylov-Subspace Methods" Published in 32nd Design Automation Conference, June 1995 Ricardo Telichevesky, Kenneth S. Kundert, and Jacob K. White Acceptance Speech × 2021 "Transition Fault Simulation" Published in IEEE Design&Test, April 1987, Volume 4, Issue 1, pp. 32-38 John A. Waicukauski, Eric Lindbloom, Barry K. Rosen, and Vijay S. Iyengar Acceptance Speech × 2020 "Networks on Chips: A New SoC Paradigm" Published in IEEE Computer, January 2002, Volume 35, Issue 1, pp. 70-78 Luca Benini, and Giovanni De Micheli Acceptance Speech × 2019 "A Logic Design Structure for LSI Testability" Proceedings of the 14th Design Automation Conference, pp. 462–468, January 1977 Thomas W. Williams, and Edward B. Eichelberger For seminal contributions to modern VLSI placement optimization research impacting both academia and industrial practices Acceptance Speech × Presentation Photo × VP Awards, Subhasish Mitra, Thomas W. Williams, and ACM SiGDA Chair David Pan 2018 "Generic Global Placement and Floorplanning" Proceedings of the 35th Annual Design Automation Conference, pp. 269-274, June 1998 Hans Eisenmann, and Frank M. Johannes For seminal contributions to VLSI placement impacting academic and industrial practices Acceptance Speech × 2017 "Chaff: Engineering an Efficient SAT Solver" Proc. of the 38th annual Design Automation Conference, pp. 530 - 535, June 2001. Matthew W. Moskewicz, Conor F. Madigan, Ying Zhao, Lintao Zhang, and Sharad Malik For seminal contributions to scalable Boolean satisfiability solving including locality-based search and efficient backtracking. Acceptance Speech × Presentation Photo × S. Malik, L. Zhang, and VP Awards H. Onodera 2016 "First-Order Incremental Block-Based Statistical Timing Analysis" Proc. of the 41st Design Automation Conference, pp. 331 – 336, June 2004. Chandu Visweswariah, Kaushik Ravindran, Kerim Kalafala, Steven G. Walker, and Sambasivan Narayan Acceptance Speech × 2015 "Silicon Physical Random Functions" Proc. of the 9th ACM Conference on Computer and Communications Security, 2002 Blaise Gassend, Dwaine Clarke, Marten van Dijk, and Srini Devadas Acceptance Speech × 2014 "X-Compact: An Efficient Response Compaction Technique for Test Cost Reduction" IEEE International Test Conference, October 2002 Subhasish Mitra, and Kee Sup Kim Acceptance Speech × Pagination 1 2 ›› Next page Last » Last page
"An Automata-Theoretic Approach to Automatic Program Verification" Published in the proceedings of the 1st Symposium on Logic in Computer Science, 1986
"Efficient Steady-State Analysis based on Matrix-Free Krylov-Subspace Methods" Published in 32nd Design Automation Conference, June 1995
"Transition Fault Simulation" Published in IEEE Design&Test, April 1987, Volume 4, Issue 1, pp. 32-38
"Networks on Chips: A New SoC Paradigm" Published in IEEE Computer, January 2002, Volume 35, Issue 1, pp. 70-78
"A Logic Design Structure for LSI Testability" Proceedings of the 14th Design Automation Conference, pp. 462–468, January 1977
For seminal contributions to modern VLSI placement optimization research impacting both academia and industrial practices
"Generic Global Placement and Floorplanning" Proceedings of the 35th Annual Design Automation Conference, pp. 269-274, June 1998
"Chaff: Engineering an Efficient SAT Solver" Proc. of the 38th annual Design Automation Conference, pp. 530 - 535, June 2001.
For seminal contributions to scalable Boolean satisfiability solving including locality-based search and efficient backtracking.
"First-Order Incremental Block-Based Statistical Timing Analysis" Proc. of the 41st Design Automation Conference, pp. 331 – 336, June 2004.
"Silicon Physical Random Functions" Proc. of the 9th ACM Conference on Computer and Communications Security, 2002
"X-Compact: An Efficient Response Compaction Technique for Test Cost Reduction" IEEE International Test Conference, October 2002